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Zephyr RTOS + Boards + Configurations + Hardware Interaction

By July 8, 2021July 22nd, 2021No Comments

Almost 700 people registered for the first-ever Zephyr Developer Summit, which took place virtually on June 8-10, to learn more about the RTOS. We had 3 tracks, 5 mini-conferences, 28 sessions and 51 speakers who presented engaging technical content, best practices, use cases and more. We’ll be adding event videos each week to the Zephyr Youtube Channel. Stay tuned here for more videos.

Today, we’re featuring all of the boards, configurations and hardware interaction presentations at Zephyr Developer Summit including Best Practices for Debugging Connected Applications running Zephyr, Developing Hardware for Zephyr, The ESP32 Status on Zephyr, Weaving Xtensa Yarns with Zephyr, Notes on an Idiosyncratic Architecture and Common application configuration for boards (Standalone, Bootloader, Chain-Loaded, Secure, Non-Secure) Mini-Conference.  Check out the abstracts and watch the videos below.

Best Practices for Debugging Connected Applications running Zephyr – Chris Coleman, Memfault, and  Luka Mustafa, IRNAS

Zephyr comes with a lot of built-in capabilities that, of course, provide a lot of value but can make it challenging to find the most efficient ways to debug issues quickly. In this talk, we will walk through configuration options and settings that can be used to investigate connectivity issues and faults when working with Zephyr. We will present how to use external tools like Memfault to speed up this process and fix these problems remotely. Finally, we will walk through some real-world examples of how IRNAS debugs their Zephyr devices in production.

Developing Hardware for Zephyr – Jared Wolff, Circuit Dojo LLC

Learn about some of the biggest takeaways from the development of the Nordic Semiconductor based nRF9160 Feather.

The ESP32 Status on Zephyr – Ricardo Tafas, Espressif Systems

In 2020, Espressif Systems has officially started to support its ESP32 family of WIFI/Bluetooth microcontrollers on Zephyr. Being complex devices and fully featured, such support takes considerable amount of work. This lightning presentation summarizes the current state of ESP32 port and what is currently being under development. Finally, the next steps in terms of support will be presented, alongside a product vision for ESP32 under Zephyr.

Weaving Xtensa Yarns with Zephyr, Notes on an Idiosyncratic Architecture – Andy Ross, Intel

Zephyr is increasingly applied on the Cadence Xtensa architecture, whose non-traditional features and highly configurable IP pose problems at multiple levels for an OS attempting to exploit them. Includes brief overview of toolchain architecture, build- and run-time configuration choices, interrupt entry and exit in the presence of register windows, cache incoherence and control, and emerging work on MPU and MMU solutions.

Common application configuration for boards (Standalone, Bootloader, Chain-Loaded, Secure, Non-Secure) Mini-Conference – Jordan Yates, DATA61 / CSIRO

The current Zephyr board abstraction does not well handle different software configurations targeting the same physical hardware. 3 common configurations for any Zephyr board are running a standalone application, a bootloader, and a chain loaded application. Each of these applications can have different requirements for ROM/RAM layouts. Secure and non-secure applications with ARMv8 TrustZone also have differing requirements.

Any solution to these problems must be driven by the linker. The discussion is around how to get from a users desire to build an application of type T for board B, to the correct linker memory regions. Ideally any solution is a step towards multi-image builds in the future.

If you have questions or would like to chat with any of our Zephyr speakers, ambassadors or members of the Technical Steering Committee (TSC), please join us on the Zephyr Slack.