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Zephyr Developer Summit: Emerging Technologies (Videos)

By August 16, 2022September 2nd, 2022No Comments

More than 380 people registered for the 2nd Annual Zephyr Developer Summit, which took place on June 8-9 in-person in Mountain View, CA and virtually for attendees around the world, to learn more about the fastest growing RTOS. We hosted a “Zephyr Intro Day” on June 7 and had 4 tracks, 2 mini-conferences, 2 tutorials, 54 sessions and 58 speakers who presented engaging technical content, best practices, use cases and more. We’ll be adding event videos each week to the Zephyr Youtube Channel.

Today, we’re featuring all of the presentations that showcase emerging technologies with Zephyr RTOS including, “Proposal for i3C SW Support in Zephyr RTOS,”  “New Implementation Proposal for Zephyr SD Protocol Stack,” “A Block Stream API for Zephyr,” “Deep Dive into Pin Control in Zephyr,” “Open Source NVMe AI Accelerator Platform with Zephyr,” “Bof: Unlocking Software Defined Power Electronics with Zephyr: Concepts and Study Case, and “Android’s CHRE and Open Source Frameworks.” Watch the videos below or click on the session title for links to the presentations.

Proposal for i3C SW Support in Zephyr RTOS” – Shashank Prashar, Associate Staff Embedded Software Engineer at Samsung Semiconductor India R&D Center, and YeEun Kim, Software Engineer at Samsung

In compact RTOS systems like Zephyr, legacy protocols like I2C & SPI, have many shortcomings. In I2C – pull-up resistors causes power dissipation & lower clock speeds. In SPI – more pins per slave device, no error checks & no slave H/W flow control. Zephyr needs a protocol that is more efficient and is superset of legacy protocols, thus comes I3C. I3C is an Improved I2C protocol – backward compatible with I2C, requires less no. of pins, less power & high bitrates up to 33.3Mbps. It supports dynamic addressing & In-Band-Interrupts, allowing slave initiated communication and new devices to hot-join. In Zephyr it can tackle multiple classes of devices –main master, secondary master, i3c slave & i2c slaves.

The presentation will cover following topics:

  • I3C Protocol – overview
  • I3C vs I2C – comparative study
  • Current SW Support in Zephyr
  • Our proposal for adding I3C support in Zephyr
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 “New Implementation Proposal for Zephyr SD Protocol Stack” – Daniel DeGrasse, Firmware Engineer at NXP Semiconductors

Zephyr RTOS offers support for SD memory card devices, exposed via the generic disk driver API. Applications can consume this API to interact with SDMMC devices, and filesystems are implemented on top of it. However, Zephyr does not implement an SD protocol stack, instead leaving this implementation up to each vendor. This results in differences between vendor support for SD devices, and large amounts of vendor specific code being included to manage SD devices. This paper proposes a new implementation of an SD protocol stack in Zephyr, and outlines the intrinsic benefits possible with this specific application. Implementing a generic SD protocol stack in Zephyr will reduce the vendor implementation requirements for SD support, pave the way for supporting SD I/O devices such as Bluetooth and WiFi cards, and allow all Zephyr devices using SD cards to benefit from one verified stack.

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A Block Stream API for Zephyr – Tom Burdick, Software Engineer at Intel

Zephyr has many wonderful device interfaces, many of which boil down to wanting to read or write to a buffer. What is generally missing is a way to connect these device interfaces with a stream of buffers to read or write in a DMA friendly way. There is currently no hardware agnostic way to request that an ADC device read into a pair of provided ping pong buffers today. Hardware specific solutions must be used to connect an ADC with hardware specific DMA configurations. I would propose an API which would optionally enable DMA usage as desired. The API would provide a list of desired operations to be performed in conjunction with a device by a executor. The executor could be software driven or backed by DMA, and could understand the details of how to perform the requested operation in conjuction with the device.

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Deep Dive into Pin Control in Zephyr” – Gerard Marull Paretas, Software and Electrical Engineer at Nordic Semiconductor

Pin control is a feature that is fundamental in most, if not all, systems. It allows configuring signal multiplexing, pin properties such as bias, drive mode, etc. Efforts have been made to standardize the way pin control works in Zephyr, leading to the new pinctrl API. We will talk about the pinctrl API in this presentation: its design principles, similarities with Linux, examples, etc.

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Open Source NVMe AI Accelerator Platform with Zephyr” – Karol Gugala, Engineering Manager at Antmicro

The talk will describe the use of the Zephyr RTOS to perform time-critical functionality of an ML-oriented UltraScale+ based data processing platform using the NVMe interface, developed by Western Digital and Antmicro for server-based AI applications. The system combines an FPGA SoC with programmable logic and an AMP CPU, running Zephyr on the Corex-R cores handling NVMe transactions and Linux on Cortex-A in an openAMP setup. Using custom NVMe commands, the platform (custom hardware from Western Digital and open source software and FPGA firmware from Antmicro) enables users to execute ML and other processing on stored data on the fly. The platform allows users to design AI pipelines in Tensorflow and run them via the uBPF framework, including a custom accelerator implemented in FPGA using TVM/VTA, showcasing how the UltraScale+’ FPGA fabric can be used for hardware-accelerated ML flows.

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Bof: Unlocking Software Defined Power Electronics with Zephyr: Concepts and Study Case” – Luis Villa, OwnTech Project – University of Toulouse at LAAS-CNRS and Jean Alinei, Project Manager + Product Engineer, OwnTech Project at LAAS-CNRS

Software Defined Power Electronics are a new concept in energy management that is based on an abstraction between power hardware and software. This approach strives to have the same performances of fully analog systems, still ubiquitous in power electronics, and the flexibility of reprogrammable digital systems. This breakout session will present the OwnTech project which leverages Zephyr as a means to achieve the necessary flexibility with microcontrollers dedicated to motor control and power electronics. A demo will also be made during the session and afterwards as well.

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Android’s CHRE and Open Source Frameworks” – Yuval Peress, Senior Software Engineer at Google

Android’s Context Hub Runtime Environment (CHRE) is an event based system used to manage multiple peripherals such as GNSS, Sensors, WiFi, BT, audio, and others in a common manner. The benefit seen to consumers is that they’re able to write small applications known as nanoapps that interact with CHRE’s API to leverage and manipulate these peripheral frameworks. The design offers modularity, flexibility, testability, and ease of update to these nanoapps. This presentation will dive into how a CHRE application is wired, the benefits of modularity, and the flexibility that this system provides. I’ll also provide details about Google/Intel’s use cases and the final benefit to the Zephyr ecosystem.

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If you have questions or would like to chat with any of our Zephyr speakers, ambassadors or members of the Technical Steering Committee (TSC), please join us on Discord.