ST Nucleo L476RG

Overview

The Nucleo L476RG board features an ARM Cortex-M4 based STM32L476RG MCU with a wide range of connectivity support and configurations. Here are some highlights of the Nucleo L476RG board:

  • STM32 microcontroller in QFP64 package
  • Two types of extension resources:
    • Arduino Uno V3 connectivity
    • ST morpho extension pin headers for full access to all STM32 I/Os
  • On-board ST-LINK/V2-1 debugger/programmer with SWD connector
  • Flexible board power supply:
    • USB VBUS or external source(3.3V, 5V, 7 - 12V)
    • Power management access point
  • Three LEDs: USB communication (LD1), user LED (LD2), power LED (LD3)
  • Two push-buttons: USER and RESET
Nucleo L476RG

More information about the board can be found at the Nucleo L476RG website.

Hardware

The STM32L476RG SoC provides the following hardware IPs:

  • Ultra-low-power with FlexPowerControl (down to 130 nA Standby mode and 100 μA/MHz run mode)
  • Core: ARM® 32-bit Cortex®-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
  • Clock Sources:
    • 4 to 48 MHz crystal oscillator
    • 32 kHz crystal oscillator for RTC (LSE)
    • Internal 16 MHz factory-trimmed RC (±1%)
    • Internal low-power 32 kHz RC (±5%)
    • Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy)
    • 3 PLLs for system clock, USB, audio, ADC
  • RTC with HW calendar, alarms and calibration
  • LCD 8 × 40 or 4 × 44 with step-up converter
  • Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
  • 16x timers:
    • 2x 16-bit advanced motor-control
    • 2x 32-bit and 5x 16-bit general purpose
    • 2x 16-bit basic
    • 2x low-power 16-bit timers (available in Stop mode)
    • 2x watchdogs
    • SysTick timer
  • Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
  • Memories
    • Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection
    • Up to 128 KB of SRAM including 32 KB with hardware parity check
    • External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
    • Quad SPI memory interface
  • 4x digital filters for sigma delta modulator
  • Rich analog peripherals (independent supply)
    • 3× 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 μA/MSPS
    • 2x 12-bit DAC, low-power sample and hold
    • 2x operational amplifiers with built-in PGA
    • 2x ultra-low-power comparators
  • 18x communication interfaces
    • USB OTG 2.0 full-speed, LPM and BCD
    • 2x SAIs (serial audio interface)
    • 3x I2C FM+(1 Mbit/s), SMBus/PMBus
    • 6x USARTs (ISO 7816, LIN, IrDA, modem)
    • 3x SPIs (4x SPIs with the Quad SPI)
    • CAN (2.0B Active) and SDMMC interface
    • SWPMI single wire protocol master I/F
  • 14-channel DMA controller
  • True random number generator
  • CRC calculation unit, 96-bit unique ID
  • Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™
More information about STM32L476RG can be found here:

Supported Features

The Zephyr nucleo_l476rg board configuration supports the following hardware features:

Interface Controller Driver/Component
NVIC on-chip nested vector interrupt controller
UART on-chip serial port-polling; serial port-interrupt
PINMUX on-chip pinmux
GPIO on-chip gpio
I2C on-chip i2c
PWM on-chip pwm

Other hardware features are not yet supported on this Zephyr port.

The default configuration can be found in the defconfig file:

boards/arm/nucleo_l476rg/nucleo_l476rg_defconfig

Connections and IOs

Nucleo L476RG Board has 8 GPIO controllers. These controllers are responsible for pin muxing, input/output, pull-up, etc.

Available pins:

Nucleo L476RG Arduino connectors Nucleo L476RG Morpho connectors

For mode details please refer to STM32 Nucleo-64 board User Manual.

Default Zephyr Peripheral Mapping:

  • UART_1_TX : PA9
  • UART_1_RX : PA10
  • UART_2_TX : PA2
  • UART_2_RX : PA3
  • UART_3_TX : PB10
  • UART_3_RX : PB11
  • I2C_0_SCL : PB6
  • I2C_0_SDA : PB7
  • PWM_2_CH1 : PA0
  • USER_PB : PC13
  • LD2 : PA5

System Clock

Nucleo L476RG System Clock could be driven by internal or external oscillator, as well as main PLL clock. By default System clock is driven by PLL clock at 80MHz, driven by 16MHz high speed internal oscillator.

Serial Port

Nucleo L476RG board has 6 U(S)ARTs. The Zephyr console output is assigned to UART2. Default settings are 115200 8N1.

Programming and Debugging

Flashing

Nucleo L476RG board includes an ST-LINK/V2-1 embedded debug tool interface. This interface is not supported by the openocd version 0.9 included by the Zephyr SDK v0.9. Until we update the Zephyr SDK, use openocd v0.10.0 from the openocd-stm32 project on GitHub to get the minimum set of scripts needed to flash and debug STM32 development boards.

$ git clone  https://github.com/erwango/openocd-stm32.git

Then follow instructions in README.md

Flashing an application to Nucleo L476RG

The sample application :ref:’hello_world` is being used in this tutorial:

To build the Zephyr kernel and application, enter:

$ cd <zephyr_root_path>
$ source zephyr-env.sh
$ cd $ZEPHYR_BASE/samples/hello_world/
$ make BOARD=nucleo_l476rg

Connect the Nucleo L476RG to your host computer using the USB port. Then, enter the following command:

$ cd <openocd-stm32_path>
$ stm32_flsh l4 $ZEPHYR_BASE/samples/hello_world/outdir/nucleo_l476rg/zephyr.bin

Run a serial host program to connect with your Nucleo board.

$ minicom -D /dev/ttyACM0

You should see the following message:

$ Hello World! arm

Debugging

Access gdb with the following make command:

$ cd <openocd-stm32_path>
$ stm32_dbg l4 $ZEPHYR_BASE/samples/hello_world/outdir/nucleo_l476rg/zephyr.elf