Configuration Options Reference Guide

Introduction

Kconfig files describe the configuration symbols supported in the build system, the logical organization and structure that group the symbols in menus and sub-menus, and the relationships between the different configuration symbols that govern the valid configuration combinations.

The Kconfig files are distributed across the build directory tree. The files are organized based on their common characteristics and on what new symbols they add to the configuration menus.

The configuration options’ information is extracted directly from Kconfig using the ~/doc/scripts/genrest/genrest.py script.

Supported Options

Configuration Options
CONFIG_KERNELVERSION  
CONFIG_ARC ARC architecture
CONFIG_ARM ARM architecture
CONFIG_X86 x86 architecture
CONFIG_NIOS2 Nios II Gen 2 architecture
CONFIG_SYS_POWER_LOW_POWER_STATE_SUPPORTED  
CONFIG_SYS_POWER_DEEP_SLEEP_SUPPORTED  
CONFIG_ARCH  
CONFIG_SOC  
CONFIG_SOC_SERIES  
CONFIG_SOC_FAMILY  
CONFIG_BOARD  
CONFIG_SOC_QUARK_D2000 Quark D2000
CONFIG_SOC_ATOM Intel ATOM SoC
CONFIG_SOC_QUARK_SE Intel Quark SE
CONFIG_SOC_IA32 Generic IA32 SoC
CONFIG_SOC_QUARK_X1000 Quark X1000
CONFIG_ARCH_DEFCONFIG  
CONFIG_NESTED_INTERRUPTS Enable nested interrupts
CONFIG_EXCEPTION_DEBUG Unhandled exception debugging
CONFIG_IDT_NUM_VECTORS Number of IDT vectors
CONFIG_MAX_IRQ_LINES Number of IRQ lines
CONFIG_PHYS_LOAD_ADDR Physical load address
CONFIG_PHYS_RAM_ADDR Physical RAM address
CONFIG_RAM_SIZE Amount of RAM given to the kernel (in kB)
CONFIG_ROM_SIZE Amount of ROM given to the kernel (in kB)
CONFIG_SET_GDT Setup GDT as part of boot process
CONFIG_GDT_DYNAMIC Store GDT in RAM so that it can be modified
CONFIG_DEBUG_IRQS Extra interrupt debugging functionality
CONFIG_CPU_ATOM  
CONFIG_CPU_MINUTEIA  
CONFIG_CPU_HAS_FPU  
CONFIG_X86_IAMCU IAMCU calling convention
CONFIG_FLOAT Floating point registers
CONFIG_FP_SHARING Floating point register sharing
CONFIG_SSE SSE registers
CONFIG_SSE_FP_MATH Compiler-generated SSEx instructions
CONFIG_REBOOT_RST_CNT Reboot via RST_CNT register
CONFIG_ISA_IA32  
CONFIG_IA32_LEGACY_IO_PORTS Support IA32 legacy IO ports
CONFIG_CMOV  
CONFIG_CACHE_LINE_SIZE_DETECT Detect cache line size at runtime
CONFIG_CACHE_LINE_SIZE Cache line size
CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED CLFLUSH instruction supported
CONFIG_CLFLUSH_DETECT Detect support of CLFLUSH instruction at runtime
CONFIG_ARCH_CACHE_FLUSH_DETECT  
CONFIG_CACHE_FLUSHING Enable cache flushing mechanism
CONFIG_NUM_DYNAMIC_STUBS Number of dynamic int stubs
CONFIG_NUM_DYNAMIC_EXC_STUBS Number of dynamic exception stubs
CONFIG_NUM_DYNAMIC_EXC_NOERR_STUBS Number of dynamic no-error exception stubs
CONFIG_PIC_DISABLE Disable PIC
CONFIG_IRQ_OFFLOAD Enable IRQ offload
CONFIG_IRQ_OFFLOAD_VECTOR IDT vector to use for IRQ offload
CONFIG_XIP Execute in place
CONFIG_EOI_FORWARDING_BUG  
CONFIG_SS_RESET_VECTOR Sensor Subsystem Reset Vector
CONFIG_ARC_INIT Quark SE ARC Kickoff
CONFIG_ARC_INIT_DEBUG Quark SE Sensor Subsystem Debug
CONFIG_ARC_GDB_ENABLE Allows the usage of GDB with the ARC processor.
CONFIG_QUARK_SE_IPM_CONSOLE_RING_BUF_SIZE32 IPM Console Ring Buffer Size
CONFIG_SOC_NIOS2E_ZEPHYR Nios IIe - Zephyr Golden Configuration
CONFIG_CPU_NIOS2_GEN2  
CONFIG_RESET_VECTOR Nios II reset vector
CONFIG_EXCEPTION_VECTOR Nios II exception vector
CONFIG_SRAM_SIZE SRAM Size in kB
CONFIG_SRAM_BASE_ADDRESS SRAM Base Address
CONFIG_FLASH_SIZE Flash Size in kB
CONFIG_FLASH_BASE_ADDRESS Flash Base Address
CONFIG_SOC_SERIES_KINETIS_K6X Kinetis K6x Series MCU
CONFIG_SOC_SERIES_STM32F1X STM32F1x Series MCU
CONFIG_SOC_ATMEL_SAM3X8E Atmel SAM3X8E Processor
CONFIG_SOC_SERIES_NRF52X Nordic Semiconductor nRF52 series MCU
CONFIG_SOC_TI_LM3S6965 TI LM3S6965
CONFIG_CPU_CORTEX  
CONFIG_CPU_CORTEX_M  
CONFIG_ISA_THUMB2  
CONFIG_CPU_CORTEX_M3_M4  
CONFIG_CPU_CORTEX_M3  
CONFIG_CPU_CORTEX_M4  
CONFIG_LDREX_STREX_AVAILABLE  
CONFIG_DATA_ENDIANNESS_LITTLE  
CONFIG_STACK_ALIGN_DOUBLE_WORD Align stacks on double-words (8 octets)
CONFIG_NUM_IRQ_PRIO_BITS  
CONFIG_RUNTIME_NMI Attach an NMI handler at runtime
CONFIG_FAULT_DUMP Fault dump level
CONFIG_SW_ISR_TABLE Enable software interrupt handler table
CONFIG_SW_ISR_TABLE_DYNAMIC Allow installing interrupt handlers at runtime
CONFIG_IRQ_VECTOR_TABLE_CUSTOM Projects provide a custom static IRQ part of vector table
CONFIG_IRQ_VECTOR_TABLE_SOC  
CONFIG_ZERO_LATENCY_IRQS Enable zero-latency interrupts
CONFIG_ARCH_HAS_TASK_ABORT  
CONFIG_ARCH_HAS_NANO_FIBER_ABORT  
CONFIG_SOC_FAMILY_KINETIS  
CONFIG_SOC_MK64F12 SOC_MK64F12
CONFIG_K64_CORE_CLOCK_DIVIDER Freescale K64 core clock divider
CONFIG_K64_BUS_CLOCK_DIVIDER Freescale K64 bus clock divider
CONFIG_K64_FLEXBUS_CLOCK_DIVIDER Freescale K64 FlexBus clock divider
CONFIG_K64_FLASH_CLOCK_DIVIDER Freescale K64 flash clock divider
CONFIG_WDOG_INIT  
CONFIG_PRESERVE_JTAG_IO_PINS Kinetis K6x JTAG pin usage
CONFIG_SOC_FAMILY_STM32  
CONFIG_SOC_STM32F103VE STM32F103VE
CONFIG_SOC_STM32F103RB STM32F103RB
CONFIG_SOC_ATMEL_SAM3  
CONFIG_SOC_ATMEL_SAM3_EXT_SLCK Atmel SAM3 to use external crystal oscillator for slow clock
CONFIG_SOC_ATMEL_SAM3_EXT_MAINCK Atmel SAM3 to use external crystal oscillator for main clock
CONFIG_SOC_ATMEL_SAM3_PLLA_MULA  
CONFIG_SOC_ATMEL_SAM3_PLLA_DIVA  
CONFIG_SOC_NRF5  
CONFIG_SOC_NRF52832 NRF52832
CONFIG_SOC_TI_LM3S6965_QEMU  
CONFIG_SOC_EM11D Synopsys ARC EM11D
CONFIG_SOC_QUARK_SE_SS Intel Quark SE - Sensor Sub System
CONFIG_SOC_EM9D Synopsys ARC EM9D
CONFIG_CPU_ARCEM4  
CONFIG_CPU_ARCV2  
CONFIG_NSIM Running on the MetaWare nSIM simulator
CONFIG_NUM_IRQ_PRIO_LEVELS Number of supported interrupt priority levels
CONFIG_NUM_REGULAR_IRQ_PRIO_LEVELS Number of supported regular interrupt priority levels
CONFIG_NUM_IRQS Upper limit of interrupt numbers/IDs used
CONFIG_FIRQ_STACK_SIZE Size of stack for FIRQs (in bytes)
CONFIG_ARC_STACK_CHECKING Enable Stack Checking
CONFIG_HARVARD Harvard Architecture
CONFIG_ICCM_SIZE ICCM Size in kB
CONFIG_ICCM_BASE_ADDRESS ICCM Base Address
CONFIG_DCCM_SIZE DCCM Size in kB
CONFIG_DCCM_BASE_ADDRESS DCCM Base Address
CONFIG_IRQ_VECTOR_TABLE_BSP  
CONFIG_BOARD_ARDUINO_DUE Arduino Due Board
CONFIG_BOARD_EM_STARTERKIT ARC EM Starter Kit
CONFIG_BOARD_QUARK_SE_SSS_DEVBOARD Quark SE Development Board - Sensor Sub System
CONFIG_BOARD_ARDUINO_101_SSS Arduino 101 Sensor Sub System
CONFIG_BOARD_QEMU_CORTEX_M3 Cortex-M3 Emulation (Qemu)
CONFIG_BOARD_ARDUINO_101 Arduino 101 Board
CONFIG_BOARD_NRF52_PCA10040 nRF52 PCA10040
CONFIG_BOARD_BASIC_CORTEX_M3 Basic Cortex-M3 Board
CONFIG_BOARD_QUARK_D2000_CRB Quark D2000 CRB
CONFIG_BOARD_MINNOWBOARD Minnowboard Max
CONFIG_BOARD_OLIMEXINO_STM32 OLIMEXINO-STM32 Development Board
CONFIG_BOARD_FRDM_K64F Freescale FRDM-K64F
CONFIG_BOARD_QUARK_SE_DEVBOARD Quark SE Development Board
CONFIG_BOARD_GALILEO Galileo Gen2
CONFIG_BOARD_STM32_MINI_A15 STM32 MINI A15 Development Board
CONFIG_BOARD_NUCLEO_F103RB NUCLEO-64 F103RB Development Board
CONFIG_BOARD_ALTERA_MAX10 Altera MAX10 Board
CONFIG_BOARD_QEMU_X86 QEMU x86
CONFIG_BOARD_BASIC_MINUTEIA Basic Minute-IA Board
CONFIG_GPIO_AS_PINRESET GPIO as pin reset (reset button)
CONFIG_PINMUX_GALILEO_EXP0_NAME Name of the GPIO expander 0
CONFIG_PINMUX_GALILEO_EXP1_NAME Name of the GPIO expander 1
CONFIG_PINMUX_GALILEO_EXP2_NAME Name of the GPIO expander 2
CONFIG_PINMUX_GALILEO_PWM0_NAME Name of the PWM LED expander 0
CONFIG_PINMUX_GALILEO_GPIO_DW_NAME Name of the DesignWare GPIO
CONFIG_PINMUX_GALILEO_GPIO_INTEL_CW_NAME Name of the Legacy Bridge Core Well GPIO
CONFIG_PINMUX_GALILEO_GPIO_INTEL_RW_NAME Name of the Legacy Bridge Resume Well GPIO
CONFIG_NANOKERNEL Nano Kernel
CONFIG_MICROKERNEL Micro Kernel
CONFIG_SYS_CLOCK_TICKS_PER_SEC System tick frequency (in ticks/second)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC System clock’s h/w timer frequency
CONFIG_SYS_CLOCK_EXISTS  
CONFIG_INIT_STACKS Initialize stack areas
CONFIG_RING_BUFFER Enable ring buffers
CONFIG_KERNEL_EVENT_LOGGER Enable kernel event logger features
CONFIG_KERNEL_EVENT_LOGGER_BUFFER_SIZE Kernel event logger buffer size
CONFIG_KERNEL_EVENT_LOGGER_DYNAMIC Kernel event logger dynamic enabling
CONFIG_KERNEL_EVENT_LOGGER_CUSTOM_TIMESTAMP Kernel event logger custom timestamp
CONFIG_THREAD_MONITOR Task and fiber monitoring [EXPERIMENTAL]
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT Default init priority
CONFIG_KERNEL_INIT_PRIORITY_DEVICE Default init priority for device drivers
CONFIG_KERNEL_EVENT_LOGGER_CONTEXT_SWITCH Context switch event logging point
CONFIG_KERNEL_EVENT_LOGGER_INTERRUPT Interrupt event logging point
CONFIG_KERNEL_EVENT_LOGGER_SLEEP Sleep event logging point
CONFIG_STACK_CANARIES Compiler stack canaries
CONFIG_BOOT_BANNER Boot banner
CONFIG_BUILD_TIMESTAMP Build Timestamp
CONFIG_INT_LATENCY_BENCHMARK Interrupt latency metrics [EXPERIMENTAL]
CONFIG_MAIN_STACK_SIZE Background task stack size (in bytes)
CONFIG_ISR_STACK_SIZE ISR and initialization stack size (in bytes)
CONFIG_THREAD_CUSTOM_DATA Task and fiber custom data
CONFIG_NANO_TIMEOUTS Enable timeouts on nanokernel objects
CONFIG_NANO_TIMERS Enable nanokernel timers
CONFIG_NANOKERNEL_TICKLESS_IDLE_SUPPORTED  
CONFIG_ERRNO Enable errno support
CONFIG_ATOMIC_OPERATIONS_C  
CONFIG_NANO_WORKQUEUE Enable nano workqueue support
CONFIG_SYSTEM_WORKQUEUE Start a system workqueue
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE System workqueue stack size
CONFIG_SYSTEM_WORKQUEUE_PRIORITY System workqueue priority
CONFIG_MICROKERNEL_SERVER_STACK_SIZE Microkernel server fiber (_k_server) stack size
CONFIG_MICROKERNEL_SERVER_PRIORITY Priority of the kernel service fiber
CONFIG_PRIORITY_CEILING Maximum priority for priority inheritance algorithm
CONFIG_COMMAND_STACK_SIZE Microkernel server command stack size (in packets)
CONFIG_NUM_COMMAND_PACKETS Number of command packets
CONFIG_NUM_TIMER_PACKETS Number of timer packets
CONFIG_NUM_TASK_PRIORITIES Number of task priorities
CONFIG_WORKLOAD_MONITOR Workload monitoring [EXPERIMENTAL]
CONFIG_MAX_NUM_TASK_IRQS Number of task IRQ objects
CONFIG_TIMESLICING Task time slicing
CONFIG_TIMESLICE_SIZE Time slice size (in ticks)
CONFIG_TIMESLICE_PRIORITY Time slicing task priority threshold
CONFIG_TASK_MONITOR Task monitoring [EXPERIMENTAL]
CONFIG_TASK_MONITOR_MASK Trace buffer mask
CONFIG_OBJECT_MONITOR Kernel object monitoring [EXPERIMENTAL]
CONFIG_SYS_POWER_MANAGEMENT Power management
CONFIG_SYS_POWER_LOW_POWER_STATE Low power state
CONFIG_SYS_POWER_DEEP_SLEEP Deep sleep state
CONFIG_DEVICE_POWER_MANAGEMENT Device power management
CONFIG_TICKLESS_IDLE Tickless idle
CONFIG_TICKLESS_IDLE_THRESH Tickless idle threshold
CONFIG_BLUETOOTH_UART  
CONFIG_BLUETOOTH_H4 H:4 UART
CONFIG_BLUETOOTH_H5 H:5 UART [EXPERIMENTAL]
CONFIG_BLUETOOTH_NO_DRIVER No default HCI driver
CONFIG_BLUETOOTH_HOST_BUFFERS Host managed incoming data buffers
CONFIG_BLUETOOTH_DEBUG_DRIVER Bluetooth driver debug
CONFIG_BLUETOOTH_UART_ON_DEV_NAME Device Name of UART Device for Bluetooth
CONFIG_BLUETOOTH_HCI_SEND_RESERVE  
CONFIG_BLUETOOTH_HCI_RECV_RESERVE  
CONFIG_NBLE Support for custom Nordic Semiconductor BLE protocol
CONFIG_BLUETOOTH_PERIPHERAL Peripheral Role support
CONFIG_BLUETOOTH_CENTRAL Central Role support
CONFIG_BLUETOOTH_GATT_CLIENT GATT client support
CONFIG_BLUETOOTH_SMP Security Manager Protocol support
CONFIG_BLUETOOTH_MAX_CONN Maximum number of simultaneous connections
CONFIG_BLUETOOTH_MAX_PAIRED Maximum number of paired devices
CONFIG_BLUETOOTH_RX_STACK_SIZE Size of the receiving fiber stack
CONFIG_BLUETOOTH_DEBUG_GATT Bluetooth Generic Attribute Profile (GATT) debug
CONFIG_NBLE_DEBUG_GAP NBLE Generic Access Profile (GAP) debug
CONFIG_NBLE_DEBUG_CONN NBLE connection debug
CONFIG_NBLE_DEBUG_RPC NBLE RPC debug
CONFIG_NBLE_UART_ON_DEV_NAME Device Name of UART Device for Nordic BLE
CONFIG_BLUETOOTH_NRF51_PM nRF51 Power Management [EXPERIMENTAL]
CONFIG_BLUETOOTH_WAIT_NOP Wait for “NOP” Command Complete event during init
CONFIG_TI_CC2520_DEBUG CC2520 driver debug
CONFIG_TI_CC2520_DRV_NAME TI CC2520 Driver’s name
CONFIG_TI_CC2520_SPI_DRV_NAME SPI driver’s name to use to access CC2520
CONFIG_TI_CC2520_SPI_FREQ SPI system frequency
CONFIG_TI_CC2520_SPI_SLAVE SPI slave linked to CC2520
CONFIG_TI_CC2520_FIBER_STACK_SIZE Driver’s internal fiber stack size
CONFIG_TI_CC2520_CHANNEL TI CC2520 Channel
CONFIG_TI_CC2520_AUTO_CRC Let the chip handling CRC on reception
CONFIG_TI_CC2520_LINK_DETAILS Forward RSSI and link information on reception to upper stack
CONFIG_TI_CC2520_AUTO_ACK Let the chip handle TX/RX IEEE 802.15.4 ACK requests
CONFIG_CONSOLE Console drivers
CONFIG_CONSOLE_HAS_DRIVER  
CONFIG_CONSOLE_HANDLER Enable console input handler
CONFIG_CONSOLE_HANDLER_SHELL Enable console input handler [ Experimental ]
CONFIG_CONSOLE_HANDLER_SHELL_STACKSIZE Console handler shell stack size
CONFIG_UART_CONSOLE Use UART for console
CONFIG_UART_CONSOLE_ON_DEV_NAME Device Name of UART Device for UART Console
CONFIG_UART_CONSOLE_INIT_PRIORITY Init priority
CONFIG_UART_CONSOLE_DEBUG_SERVER_HOOKS Debug server hooks in debug console
CONFIG_RAM_CONSOLE Use RAM console
CONFIG_RAM_CONSOLE_BUFFER_SIZE Ram Console buffer size
CONFIG_IPM_CONSOLE_SENDER Inter-processor Mailbox console sender
CONFIG_IPM_CONSOLE_RECEIVER Inter-processor Mailbox console receiver
CONFIG_IPM_CONSOLE_INIT_PRIORITY IPM console init priority
CONFIG_UART_PIPE Enable pipe UART driver
CONFIG_UART_PIPE_ON_DEV_NAME Device Name of UART Device for pipe UART
CONFIG_SYS_LOG_ETHERNET_LEVEL Grove Log level
CONFIG_ETH_DW Synopsys DesignWare Ethernet driver
CONFIG_ETH_DW_SHARED_IRQ  
CONFIG_ETH_DW_0 Synopsys DesignWare Ethernet port 0
CONFIG_ETH_DW_0_NAME Driver name
CONFIG_ETH_DW_0_IRQ_DIRECT Direct Hardware Interrupt
CONFIG_ETH_DW_0_IRQ_SHARED Shared IRQ
CONFIG_ETH_DW_0_IRQ_SHARED_NAME Device name for Shared IRQ
CONFIG_ETH_DW_0_IRQ_PRI Controller interrupt priority
CONFIG_SERIAL Serial Drivers
CONFIG_SERIAL_HAS_DRIVER  
CONFIG_UART_INTERRUPT_DRIVEN Enable UART Interrupt support
CONFIG_UART_LINE_CTRL Enable Serial Line Control API
CONFIG_UART_DRV_CMD Enable driver commands API
CONFIG_UART_NS16550 NS16550 serial driver
CONFIG_UART_NS16550_PCI Enable PCI Support
CONFIG_UART_NS16550_DLF Enable Divisor Latch Fraction (DLF) support
CONFIG_UART_NS16550_LINE_CTRL Enable Serial Line Control for Apps
CONFIG_UART_NS16550_DRV_CMD Enable Driver Commands
CONFIG_UART_NS16550_PORT_0 Enable NS16550 Port 0
CONFIG_UART_NS16550_PORT_0_NAME Port 0 Device Name
CONFIG_UART_NS16550_PORT_0_IRQ_PRI Port 0 Interrupt Priority
CONFIG_UART_NS16550_PORT_0_BAUD_RATE Port 0 Baud Rate
CONFIG_UART_NS16550_PORT_0_OPTIONS Port 0 Options
CONFIG_UART_NS16550_PORT_0_DLF Port 0 DLF value
CONFIG_UART_NS16550_PORT_0_PCI Port 0 is PCI-based
CONFIG_UART_NS16550_PORT_1 Enable NS16550 Port 1
CONFIG_UART_NS16550_PORT_1_NAME Port 1 Device Name
CONFIG_UART_NS16550_PORT_1_IRQ_PRI Port 1 Interrupt Priority
CONFIG_UART_NS16550_PORT_1_BAUD_RATE Port 1 Baud Rate
CONFIG_UART_NS16550_PORT_1_OPTIONS Port 1 Options
CONFIG_UART_NS16550_PORT_1_DLF Port 1 DLF value
CONFIG_UART_K20 K20 serial driver
CONFIG_UART_K20_PORT_0 Enable K20 UART Port 0
CONFIG_UART_K20_PORT_0_NAME Port 0 Device Name
CONFIG_UART_K20_PORT_0_IRQ_PRI Port 0 Interrupt Priority
CONFIG_UART_K20_PORT_0_BAUD_RATE Port 0 Baud Rate
CONFIG_UART_K20_PORT_1 Enable K20 UART Port 1
CONFIG_UART_K20_PORT_1_NAME Port 1 Device Name
CONFIG_UART_K20_PORT_1_IRQ_PRI Port 1 Interrupt Priority
CONFIG_UART_K20_PORT_1_BAUD_RATE Port 1 Baud Rate
CONFIG_UART_K20_PORT_2 Enable K20 UART Port 2
CONFIG_UART_K20_PORT_2_NAME Port 2 Device Name
CONFIG_UART_K20_PORT_2_IRQ_PRI Port 2 Interrupt Priority
CONFIG_UART_K20_PORT_2_BAUD_RATE Port 2 Baud Rate
CONFIG_UART_K20_PORT_3 Enable K20 UART Port 3
CONFIG_UART_K20_PORT_3_NAME Port 3 Device Name
CONFIG_UART_K20_PORT_3_IRQ_PRI Port 3 Interrupt Priority
CONFIG_UART_K20_PORT_3_BAUD_RATE Port 3 Baud Rate
CONFIG_UART_K20_PORT_4 Enable K20 UART Port 4
CONFIG_UART_K20_PORT_4_NAME Port 4 Device Name
CONFIG_UART_K20_PORT_4_IRQ_PRI Port 4 Interrupt Priority
CONFIG_UART_K20_PORT_4_BAUD_RATE Port 4 Baud Rate
CONFIG_UART_STELLARIS Stellaris serial driver
CONFIG_UART_STELLARIS_PORT_0 Enable Stellaris UART Port 0
CONFIG_UART_STELLARIS_PORT_0_NAME Port 0 Device Name
CONFIG_UART_STELLARIS_PORT_0_IRQ_PRI Port 0 Interrupt Priority
CONFIG_UART_STELLARIS_PORT_0_BAUD_RATE Port 0 Baud Rate
CONFIG_UART_STELLARIS_PORT_1 Enable Stellaris UART Port 1
CONFIG_UART_STELLARIS_PORT_1_NAME Port 1 Device Name
CONFIG_UART_STELLARIS_PORT_1_IRQ_PRI Port 1 Interrupt Priority
CONFIG_UART_STELLARIS_PORT_1_BAUD_RATE Port 1 Baud Rate
CONFIG_UART_STELLARIS_PORT_2 Enable Stellaris UART Port 2
CONFIG_UART_STELLARIS_PORT_2_NAME Port 2 Device Name
CONFIG_UART_STELLARIS_PORT_2_IRQ_PRI Port 2 Interrupt Priority
CONFIG_UART_STELLARIS_PORT_2_BAUD_RATE Port 2 Baud Rate
CONFIG_UART_NSIM UART driver for MetaWare nSim
CONFIG_UART_NSIM_PORT_0_NAME Port 0 Device Name
CONFIG_UART_NSIM_PORT_0_BASE_ADDR Port 0 Register Address
CONFIG_UART_ATMEL_SAM3 Atmel SAM3 family processor UART driver
CONFIG_UART_ATMEL_SAM3_NAME Device Name for Atmel SAM3 UART
CONFIG_UART_ATMEL_SAM3_IRQ_PRI Atmel SAM3 UART Interrupt Priority
CONFIG_UART_ATMEL_SAM3_BAUD_RATE Atmel SAM3 UART Baud Rate
CONFIG_UART_ATMEL_SAM3_CLK_FREQ Atmel SAM3 UART Clock Frequency
CONFIG_UART_QMSI QMSI UART driver
CONFIG_UART_QMSI_0 Enable UART 0 controller
CONFIG_UART_QMSI_0_NAME UART_0 device name
CONFIG_UART_QMSI_0_BAUDRATE UART_0 baud rate
CONFIG_UART_QMSI_0_HW_FC HW flow control for UART_0 controller
CONFIG_UART_QMSI_0_IRQ_PRI IRQ priority from UART_0 controller
CONFIG_UART_QMSI_1 Enable UART 1 controller
CONFIG_UART_QMSI_1_NAME UART_1 device name
CONFIG_UART_QMSI_1_BAUDRATE UART_1 baud rate
CONFIG_UART_QMSI_1_HW_FC HW flow control for UART_1 controller
CONFIG_UART_QMSI_1_IRQ_PRI IRQ priority from UART_1 controller
CONFIG_UART_STM32 STM32 MCU serial driver
CONFIG_UART_STM32_PORT_0 Enable STM32 USART1 Port
CONFIG_UART_STM32_PORT_0_NAME Device Name for STM32 USART1 Port
CONFIG_UART_STM32_PORT_0_BAUD_RATE STM32 USART1 Baud Rate
CONFIG_UART_STM32_PORT_0_IRQ_PRI STM32 USART1 Interrupt Priority
CONFIG_UART_STM32_PORT_1 Enable STM32 USART2 Port
CONFIG_UART_STM32_PORT_1_NAME Device Name for STM32 USART1 Port
CONFIG_UART_STM32_PORT_1_BAUD_RATE STM32 USART1 Baud Rate
CONFIG_UART_STM32_PORT_1_IRQ_PRI STM32 USART2 Interrupt Priority
CONFIG_UART_STM32_PORT_2 Enable STM32 USART3 Port
CONFIG_UART_STM32_PORT_2_NAME Device Name for STM32 USART1 Port
CONFIG_UART_STM32_PORT_2_BAUD_RATE STM32 USART1 Baud Rate
CONFIG_UART_STM32_PORT_2_IRQ_PRI STM32 USART3 Interrupt Priority
CONFIG_UART_NRF5 Nordic Semiconductor NRF5 family processor UART driver
CONFIG_UART_NRF5_NAME Device Name for Nordic Semicondoctor nRF5 UART
CONFIG_UART_NRF5_IRQ_PRI UART Interrupt Priority (Interrupt support)
CONFIG_UART_NRF5_BAUD_RATE Baud Rate
CONFIG_UART_NRF5_CLK_FREQ  
CONFIG_UART_NRF5_FLOW_CONTROL Enable Flow Control
CONFIG_UART_NRF5_GPIO_TX_PIN TX Pin Number
CONFIG_UART_NRF5_GPIO_RX_PIN RX Pin Number
CONFIG_UART_NRF5_GPIO_RTS_PIN RTS Pin Number
CONFIG_UART_NRF5_GPIO_CTS_PIN CTS Pin Number
CONFIG_LOAPIC LOAPIC
CONFIG_LOAPIC_BASE_ADDRESS Local APIC Base Address
CONFIG_LOAPIC_SPURIOUS_VECTOR Handle LOAPIC spurious interrupts
CONFIG_LOAPIC_SPURIOUS_VECTOR_ID LOAPIC spurious vector ID
CONFIG_IOAPIC IO-APIC
CONFIG_IOAPIC_DEBUG IO-APIC Debugging
CONFIG_IOAPIC_BASE_ADDRESS IO-APIC Base Address
CONFIG_IOAPIC_NUM_RTES Number of Redirection Table Entries available
CONFIG_MVIC Intel Quark D2000 Interrupt Controller (MVIC)
CONFIG_ARCV2_INTERRUPT_UNIT ARCv2 Interrupt Unit
CONFIG_EXTI_STM32 External Interrupt/Event Controller (EXTI) Driver for STM32 family of MCUs
CONFIG_EXTI_STM32_EXTI0_IRQ_PRI EXTI0 IRQ priority
CONFIG_EXTI_STM32_EXTI1_IRQ_PRI EXTI1 IRQ priority
CONFIG_EXTI_STM32_EXTI2_IRQ_PRI EXTI2 IRQ priority
CONFIG_EXTI_STM32_EXTI3_IRQ_PRI EXTI3 IRQ priority
CONFIG_EXTI_STM32_EXTI4_IRQ_PRI EXTI4 IRQ priority
CONFIG_EXTI_STM32_EXTI9_5_IRQ_PRI EXTI9:5 IRQ priority
CONFIG_EXTI_STM32_EXTI15_10_IRQ_PRI EXTI15:10 IRQ priority
CONFIG_HPET_TIMER HPET timer
CONFIG_HPET_TIMER_LEGACY_EMULATION HPET timer legacy emulation mode
CONFIG_HPET_TIMER_DEBUG Enable HPET debug output
CONFIG_HPET_TIMER_BASE_ADDRESS HPET Base Address
CONFIG_HPET_TIMER_IRQ HPET Timer IRQ
CONFIG_HPET_TIMER_IRQ_PRIORITY HPET Timer IRQ Priority
CONFIG_HPET_TIMER_FALLING_EDGE Falling Edge
CONFIG_HPET_TIMER_RISING_EDGE Rising Edge
CONFIG_HPET_TIMER_LEVEL_HIGH Level High
CONFIG_HPET_TIMER_LEVEL_LOW Level Low
CONFIG_LOAPIC_TIMER LOAPIC timer
CONFIG_LOAPIC_TIMER_IRQ Local APIC Timer IRQ
CONFIG_LOAPIC_TIMER_IRQ_PRIORITY Local APIC Timer IRQ Priority
CONFIG_LOAPIC_TIMER_DIVIDER_UNSUPPORTED LOAPIC timer divider unsupported
CONFIG_ARCV2_TIMER ARC Timer
CONFIG_CORTEX_M_SYSTICK Cortex-M SYSTICK timer
CONFIG_NIOS2_AVALON_TIMER Nios II Avalon Interval Timer
CONFIG_SYSTEM_CLOCK_DISABLE API to disable system clock
CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME Timer queries its hardware to find its frequency at runtime
CONFIG_SYSTEM_CLOCK_INIT_PRIORITY System clock driver initialization priority
CONFIG_RANDOM_GENERATOR Custom random generator
CONFIG_TEST_RANDOM_GENERATOR Non-random number generator
CONFIG_X86_TSC_RANDOM_GENERATOR x86 timestamp counter based number generator
CONFIG_TIMER_RANDOM_GENERATOR System timer clock based number generator
CONFIG_GROVE Grove Device Drivers
CONFIG_SYS_LOG_GROVE_LEVEL Grove Log level
CONFIG_GROVE_LCD_RGB Enable the Seeed Grove LCD RGB Backlight
CONFIG_GROVE_LCD_RGB_I2C_MASTER_DEV_NAME I2C Master where Grove LCD is connected
CONFIG_GROVE_LCD_RGB_INIT_PRIORITY Init priority
CONFIG_GROVE_LIGHT_SENSOR Enable the Seeed Grove Light Sensor
CONFIG_GROVE_LIGHT_SENSOR_NAME Driver name
CONFIG_GROVE_LIGHT_SENSOR_ADC_DEV_NAME ADC where Grove Light Sensor is connected
CONFIG_GROVE_LIGHT_SENSOR_ADC_CHANNEL ADC channel used by Grove Light Sensor
CONFIG_GROVE_LIGHT_SENSOR_INIT_PRIORITY Init priority
CONFIG_GROVE_TEMPERATURE_SENSOR Enable the Seeed Grove Temperature Sensor
CONFIG_GROVE_TEMPERATURE_SENSOR_NAME Driver name
CONFIG_GROVE_TEMPERATURE_SENSOR_V1_0 v1.0
CONFIG_GROVE_TEMPERATURE_SENSOR_V1_X v1.1/v1.2
CONFIG_GROVE_TEMPERATURE_SENSOR_ADC_DEV_NAME ADC where Grove Temperature Sensor is connected
CONFIG_GROVE_TEMPERATURE_SENSOR_ADC_CHANNEL ADC channel used by Grove Temperature Sensor
CONFIG_GROVE_TEMPERATURE_SENSOR_INIT_PRIORITY Init priority
CONFIG_PCI PCI Settings
CONFIG_PCI_ENUMERATION Enable PCI device enumeration
CONFIG_PCI_LEGACY_BRIDGE PCI legacy bridge device support
CONFIG_PCI_LEGACY_BRIDGE_BUS PCI Legacy Bridge Bus number
CONFIG_PCI_LEGACY_BRIDGE_DEV PCI Legacy Bridge Device number
CONFIG_PCI_LEGACY_BRIDGE_VENDOR_ID PCI Legacy Bridge Vendor ID
CONFIG_PCI_LEGACY_BRIDGE_DEVICE_ID PCI Legacy Bridge Device ID
CONFIG_PCI_DEBUG Enable PCI debugging
CONFIG_GPIO GPIO Drivers
CONFIG_GPIO_DEBUG Debug output for GPIO drivers
CONFIG_GPIO_DW Designware GPIO
CONFIG_GPIO_DW_SHARED_IRQ  
CONFIG_GPIO_DW_INIT_PRIORITY Init priority
CONFIG_GPIO_DW_CLOCK_GATE Enable glock gating
CONFIG_GPIO_DW_CLOCK_GATE_DRV_NAME  
CONFIG_GPIO_DW_0 Designware GPIO block 0
CONFIG_GPIO_DW_0_NAME Driver name
CONFIG_GPIO_DW_0_CLOCK_GATE_SUBSYS Clock controller’s subsystem
CONFIG_GPIO_DW_0_IRQ_DIRECT Direct Hardware Interrupt
CONFIG_GPIO_DW_0_IRQ_SHARED Shared IRQ
CONFIG_GPIO_DW_0_IRQ_SHARED_NAME Device name for Shared IRQ
CONFIG_GPIO_DW_0_IRQ_PRI Controller interrupt priority
CONFIG_GPIO_DW_1 Designware GPIO block 1
CONFIG_GPIO_DW_1_NAME Driver name
CONFIG_GPIO_DW_1_CLOCK_GATE_SUBSYS Clock controller’s subsystem
CONFIG_GPIO_DW_1_IRQ_DIRECT Direct Hardware Interrupt
CONFIG_GPIO_DW_1_IRQ_SHARED Shared IRQ
CONFIG_GPIO_DW_1_IRQ_SHARED_NAME Device name for Shared IRQ
CONFIG_GPIO_DW_1_IRQ_PRI Controller interrupt priority
CONFIG_GPIO_DW_2 Designware GPIO block 1
CONFIG_GPIO_DW_2_NAME Driver name
CONFIG_GPIO_DW_2_CLOCK_GATE_SUBSYS Clock controller’s subsystem
CONFIG_GPIO_DW_2_IRQ_DIRECT Direct Hardware Interrupt
CONFIG_GPIO_DW_2_IRQ_SHARED Shared IRQ
CONFIG_GPIO_DW_2_IRQ_SHARED_NAME Device name for Shared IRQ
CONFIG_GPIO_DW_2_IRQ_PRI Controller interrupt priority
CONFIG_GPIO_DW_3 Designware GPIO block 1
CONFIG_GPIO_DW_3_NAME Driver name
CONFIG_GPIO_DW_3_CLOCK_GATE_SUBSYS Clock controller’s subsystem
CONFIG_GPIO_DW_3_IRQ_DIRECT Direct Hardware Interrupt
CONFIG_GPIO_DW_3_IRQ_SHARED Shared IRQ
CONFIG_GPIO_DW_3_IRQ_SHARED_NAME Device name for Shared IRQ
CONFIG_GPIO_DW_3_IRQ_PRI Controller interrupt priority
CONFIG_GPIO_PCAL9535A PCAL9535A I2C-based GPIO chip
CONFIG_GPIO_PCAL9535A_DEBUG Enable PCAL9535A Debugging
CONFIG_GPIO_PCAL9535A_INIT_PRIORITY Init priority
CONFIG_GPIO_PCAL9535A_0 PCAL9535A GPIO chip #0
CONFIG_GPIO_PCAL9535A_0_DEV_NAME PCAL9535A GPIO chip #0 Device Name
CONFIG_GPIO_PCAL9535A_0_I2C_ADDR PCAL9535A GPIO chip #0 I2C slave address
CONFIG_GPIO_PCAL9535A_0_I2C_MASTER_DEV_NAME I2C Master where PCAL9535A GPIO chip #0 is connected
CONFIG_GPIO_PCAL9535A_1 PCAL9535A GPIO chip #1
CONFIG_GPIO_PCAL9535A_1_DEV_NAME PCAL9535A GPIO chip #1 Device Name
CONFIG_GPIO_PCAL9535A_1_I2C_ADDR PCAL9535A GPIO chip #1 I2C slave address
CONFIG_GPIO_PCAL9535A_1_I2C_MASTER_DEV_NAME I2C Master where PCAL9535A GPIO chip #1 is connected
CONFIG_GPIO_PCAL9535A_2 PCAL9535A GPIO chip #2
CONFIG_GPIO_PCAL9535A_2_DEV_NAME PCAL9535A GPIO chip #2 Device Name
CONFIG_GPIO_PCAL9535A_2_I2C_ADDR PCAL9535A GPIO chip #2 I2C slave address
CONFIG_GPIO_PCAL9535A_2_I2C_MASTER_DEV_NAME I2C Master where PCAL9535A GPIO chip #2 is connected
CONFIG_GPIO_PCAL9535A_3 PCAL9535A GPIO chip #3
CONFIG_GPIO_PCAL9535A_3_DEV_NAME PCAL9535A GPIO chip #3 Device Name
CONFIG_GPIO_PCAL9535A_3_I2C_ADDR PCAL9535A GPIO chip #3 I2C slave address
CONFIG_GPIO_PCAL9535A_3_I2C_MASTER_DEV_NAME I2C Master where PCAL9535A GPIO chip #3 is connected
CONFIG_GPIO_MMIO MMIO-based GPIO driver
CONFIG_GPIO_MMIO_INIT_PRIORITY Init priority
CONFIG_GPIO_MMIO_0 MMIO-based GPIO Port #0
CONFIG_GPIO_MMIO_0_DEV_NAME MMIO-based GPIO Port #0 Device Name
CONFIG_GPIO_MMIO_0_ACCESS_MM Direct Memory Access
CONFIG_GPIO_MMIO_0_ACCESS_IO I/O Port
CONFIG_GPIO_MMIO_0_CFG MMIO-based GPIO Port #0 Configuration
CONFIG_GPIO_MMIO_0_EN MMIO-based GPIO Port #0 Enable Register Address
CONFIG_GPIO_MMIO_0_DIR MMIO-based GPIO Port #0 Direction Register Address
CONFIG_GPIO_MMIO_0_INPUT MMIO-based GPIO Port #0 Input Pin Level Register Address
CONFIG_GPIO_MMIO_0_OUTPUT MMIO-based GPIO Port #0 Output Pin Level Register Address
CONFIG_GPIO_MMIO_1 MMIO-based GPIO Port #1
CONFIG_GPIO_MMIO_1_DEV_NAME MMIO-based GPIO Port #1 Device Name
CONFIG_GPIO_MMIO_1_ACCESS_MM Direct Memory Access
CONFIG_GPIO_MMIO_1_ACCESS_IO I/O Port
CONFIG_GPIO_MMIO_1_CFG MMIO-based GPIO Port #1 Configuration
CONFIG_GPIO_MMIO_1_EN MMIO-based GPIO Port #1 Enable Register Address
CONFIG_GPIO_MMIO_1_DIR MMIO-based GPIO Port #1 Direction Register Address
CONFIG_GPIO_MMIO_1_INPUT MMIO-based GPIO Port #1 Input Pin Level Register Address
CONFIG_GPIO_MMIO_1_OUTPUT MMIO-based GPIO Port #1 Output Pin Level Register Address
CONFIG_GPIO_QMSI QMSI GPIO driver
CONFIG_GPIO_QMSI_INIT_PRIORITY Init priority
CONFIG_GPIO_QMSI_0 QMSI GPIO block 0
CONFIG_GPIO_QMSI_0_NAME Driver name
CONFIG_GPIO_QMSI_0_IRQ_PRI Controller interrupt priority
CONFIG_GPIO_QMSI_AON QMSI GPIO block AON
CONFIG_GPIO_QMSI_AON_NAME Driver name
CONFIG_GPIO_QMSI_AON_IRQ_PRI Controller interrupt priority
CONFIG_GPIO_QMSI_SS QMSI SENSOR GPIO driver
CONFIG_GPIO_QMSI_SS_0 QMSI GPIO block 0
CONFIG_GPIO_QMSI_SS_0_NAME Driver name
CONFIG_GPIO_QMSI_SS_0_PRI Controller interrupt priority
CONFIG_GPIO_QMSI_SS_1 QMSI GPIO block 1
CONFIG_GPIO_QMSI_SS_1_NAME Driver name
CONFIG_GPIO_QMSI_SS_1_PRI Controller interrupt priority
CONFIG_GPIO_SCH Intel SCH GPIO controller
CONFIG_GPIO_SCH_INIT_PRIORITY Init priority
CONFIG_GPIO_SCH_0 Enable SCH GPIO port 0
CONFIG_GPIO_SCH_0_DEV_NAME Name of the device
CONFIG_GPIO_SCH_1 Enable SCH GPIO port 1
CONFIG_GPIO_SCH_1_DEV_NAME Name of the device
CONFIG_GPIO_K64 Freescale K64-based GPIO driver
CONFIG_PORT_K64_INT_STATUS_OFFSET Freescale K64-based Port Control interrupt status register offset
CONFIG_GPIO_K64_A Freescale K64-based GPIO Port A
CONFIG_GPIO_K64_A_DEV_NAME Freescale K64-based GPIO Port A Device Name
CONFIG_GPIO_K64_PORTA_PRI Freescale K64-based Port A interrupt priority
CONFIG_GPIO_K64_B Freescale K64-based GPIO Port B
CONFIG_GPIO_K64_B_DEV_NAME Freescale K64-based GPIO Port B Device Name
CONFIG_GPIO_K64_PORTB_PRI Freescale K64-based Port B interrupt priority
CONFIG_GPIO_K64_C Freescale K64-based GPIO Port B
CONFIG_GPIO_K64_C_DEV_NAME Freescale K64-based GPIO Port B Device Name
CONFIG_GPIO_K64_PORTC_PRI Freescale K64-based Port C interrupt priority
CONFIG_GPIO_K64_D Freescale K64-based GPIO Port D
CONFIG_GPIO_K64_D_DEV_NAME Freescale K64-based GPIO Port D Device Name
CONFIG_GPIO_K64_PORTD_PRI Freescale K64-based Port D interrupt priority
CONFIG_GPIO_K64_E Freescale K64-based GPIO Port E
CONFIG_GPIO_K64_E_DEV_NAME Freescale K64-based GPIO Port E Device Name
CONFIG_GPIO_K64_PORTE_PRI Freescale K64-based Port E interrupt priority
CONFIG_GPIO_ATMEL_SAM3 Atmel SAM3 PIO Controllers
CONFIG_GPIO_ATMEL_SAM3_PORTA Enable driver for Atmel SAM3 PIO Port A
CONFIG_GPIO_ATMEL_SAM3_PORTA_DEV_NAME Device name for Port A
CONFIG_GPIO_ATMEL_SAM3_PORTA_IRQ_PRI Interrupt Priority for Port A
CONFIG_GPIO_ATMEL_SAM3_PORTB Enable driver for Atmel SAM3 PIO Port B
CONFIG_GPIO_ATMEL_SAM3_PORTB_DEV_NAME Device name for Port B
CONFIG_GPIO_ATMEL_SAM3_PORTB_IRQ_PRI Interrupt Priority for Port B
CONFIG_GPIO_ATMEL_SAM3_PORTC Enable driver for Atmel SAM3 PIO Port C
CONFIG_GPIO_ATMEL_SAM3_PORTC_DEV_NAME Device name for Port C
CONFIG_GPIO_ATMEL_SAM3_PORTC_IRQ_PRI Interrupt Priority for Port C
CONFIG_GPIO_ATMEL_SAM3_PORTD Enable driver for Atmel SAM3 PIO Port D
CONFIG_GPIO_ATMEL_SAM3_PORTD_DEV_NAME Device name for Port D
CONFIG_GPIO_ATMEL_SAM3_PORTD_IRQ_PRI Interrupt Priority for Port D
CONFIG_GPIO_STM32 GPIO Driver for STM32 family of MCUs
CONFIG_GPIO_STM32_PORTA Enable GPIO port A support
CONFIG_GPIO_STM32_PORTB Enable GPIO port B support
CONFIG_GPIO_STM32_PORTC Enable GPIO port C support
CONFIG_GPIO_STM32_PORTD Enable GPIO port D support
CONFIG_GPIO_STM32_PORTE Enable GPIO port E support
CONFIG_GPIO_STM32_PORTF Enable GPIO port F support
CONFIG_GPIO_STM32_PORTG Enable GPIO port G support
CONFIG_GPIO_NRF5 Nordic Semiconductor nRF5X-based GPIO driver
CONFIG_GPIO_NRF5_P0 nRF5x GPIO Port P0 options
CONFIG_GPIO_NRF5_P0_DEV_NAME GPIO Port P0 Device Name
CONFIG_GPIO_NRF5_PORT_P0_PRI GPIOTE P0 interrupt priority
CONFIG_SHARED_IRQ Shared interrupt driver
CONFIG_SHARED_IRQ_NUM_CLIENTS The number of clients per instance
CONFIG_SHARED_IRQ_INIT_PRIORITY Shared IRQ init priority
CONFIG_SHARED_IRQ_0 Shared interrupt instance 0
CONFIG_SHARED_IRQ_0_NAME Select a name for the device
CONFIG_SHARED_IRQ_0_IRQ instance 0 interrupt
CONFIG_SHARED_IRQ_0_PRI instance 0 interrupt priority
CONFIG_SHARED_IRQ_0_FALLING_EDGE Falling Edge
CONFIG_SHARED_IRQ_0_RISING_EDGE Rising Edge
CONFIG_SHARED_IRQ_0_LEVEL_HIGH Level High
CONFIG_SHARED_IRQ_0_LEVEL_LOW Level Low
CONFIG_SHARED_IRQ_1 Shared interrupt instance 1
CONFIG_SHARED_IRQ_1_NAME Select a name for the device
CONFIG_SHARED_IRQ_1_IRQ instance 1 interrupt
CONFIG_SHARED_IRQ_1_PRI instance 1 interrupt priority
CONFIG_SHARED_IRQ_1_FALLING_EDGE Falling Edge
CONFIG_SHARED_IRQ_1_RISING_EDGE Rising Edge
CONFIG_SHARED_IRQ_1_LEVEL_HIGH Level High
CONFIG_SHARED_IRQ_1_LEVEL_LOW Level Low
CONFIG_SPI SPI hardware bus support
CONFIG_SPI_QMSI QMSI driver for SPI controller
CONFIG_SPI_QMSI_SS QMSI driver for SPI controller on Sensor Subsystem
CONFIG_SPI_K64 Freescale K64-based SPI controller driver
CONFIG_SPI_INTEL Intel SPI controller driver
CONFIG_SPI_INIT_PRIORITY Init priority
CONFIG_SYS_LOG_SPI_LEVEL SPI Driver Log level
CONFIG_SPI_CS_GPIO SPI port CS pin is controlled via a GPIO port
CONFIG_SPI_0 Intel SPI port 0
CONFIG_SPI_0_NAME SPI port 0 device name
CONFIG_SPI_0_IRQ_PRI Port 0 interrupt priority
CONFIG_SPI_0_CS_GPIO_PORT The GPIO port which is used to control CS
CONFIG_SPI_0_CS_GPIO_PIN The GPIO PIN which is used to act as a CS pin
CONFIG_SPI_1 SPI port 1
CONFIG_SPI_1_NAME SPI port 1 device name
CONFIG_SPI_1_IRQ_PRI Port 0 interrupt priority
CONFIG_SPI_1_CS_GPIO_PORT The GPIO port which is used to control CS
CONFIG_SPI_1_CS_GPIO_PIN The GPIO PIN which is used to act as a CS pin
CONFIG_SPI_2 SPI port 1
CONFIG_SPI_2_NAME SPI port 1 device name
CONFIG_SPI_2_IRQ_PRI Port 0 interrupt priority
CONFIG_SPI_2_CS_GPIO_PORT The GPIO port which is used to control CS
CONFIG_SPI_2_CS_GPIO_PIN The GPIO PIN which is used to act as a CS pin
CONFIG_SPI_DW Designware SPI controller driver
CONFIG_SPI_DW_ARC_AUX_REGS Registers are part of ARC auxiliary registers
CONFIG_SPI_DW_INTERRUPT_SINGLE_LINE Single interrupt line for all interrupts
CONFIG_SPI_DW_INTERRUPT_SEPARATED_LINES One line per-interrupt type (RX, TX and ERROR)
CONFIG_SPI_DW_CLOCK_GATE Enable glock gating
CONFIG_SPI_DW_CLOCK_GATE_DRV_NAME  
CONFIG_SPI_DW_FIFO_DEPTH Rx and Tx FIFO Depth
CONFIG_SPI_DW_PORT_0_CLOCK_GATE_SUBSYS Clock controller’s subsystem
CONFIG_SPI_DW_PORT_1_CLOCK_GATE_SUBSYS Clock controller’s subsystem
CONFIG_I2C I2C Drivers
CONFIG_I2C_DW Design Ware I2C support
CONFIG_I2C_QUARK_SE_SS I2C Driver for Quark SE Sensor Subsystem (SS)
CONFIG_I2C_QMSI_SS QMSI I2C driver for the Sensor Subsystem
CONFIG_I2C_QMSI QMSI I2C driver
CONFIG_I2C_ATMEL_SAM3 Atmel SAM3 I2C Driver
CONFIG_I2C_INIT_PRIORITY Init priority
CONFIG_I2C_CLOCK_SPEED Set the clock speed for I2C
CONFIG_I2C_DEBUG Enable I2C debug options
CONFIG_I2C_SHARED_IRQ  
CONFIG_I2C_0_IRQ_DIRECT Direct Hardware Interrupt
CONFIG_I2C_0_IRQ_SHARED Shared IRQ
CONFIG_I2C_0_IRQ_SHARED_NAME Device name for Shared IRQ
CONFIG_I2C_0 Enable I2C_0
CONFIG_I2C_0_NAME Select a name for finding the device
CONFIG_I2C_0_DEFAULT_CFG I2C default configuration
CONFIG_I2C_0_IRQ_PRI Controller interrupt priority
CONFIG_I2C_1 Enable I2C Port 1
CONFIG_I2C_1_NAME Select a name for finding the device
CONFIG_I2C_1_DEFAULT_CFG I2C default configuration
CONFIG_I2C_1_IRQ_PRI Controller interrupt priority
CONFIG_PWM PWM (Pulse Width Modulation) Drivers
CONFIG_PWM_PCA9685 PCA9685 I2C-based PWM chip
CONFIG_PWM_PCA9685_INIT_PRIORITY Init priority
CONFIG_PWM_PCA9685_0 PCA9685 PWM chip #0
CONFIG_PWM_PCA9685_0_DEV_NAME PCA9685 PWM chip #0 Device Name
CONFIG_PWM_PCA9685_0_I2C_ADDR PCA9685 PWM chip #0 I2C slave address
CONFIG_PWM_PCA9685_0_I2C_MASTER_DEV_NAME I2C Master where PCA9685 PWM chip #0 is connected
CONFIG_PWM_QMSI QMSI PWM Driver
CONFIG_PWM_QMSI_DEV_NAME QMSI PWM Device Name
CONFIG_PWM_QMSI_NUM_PORTS Number of PWM ports for PWM
CONFIG_PWM_DW DesignWare PWM
CONFIG_PWM_DW_0_DRV_NAME DesignWare PWM Device Name
CONFIG_PWM_K64_FTM PWM with Freescale K64 Flex Timer Module (FTM)
CONFIG_PWM_K64_FTM_DEBUG Enable Debugging for pwm_ftm driver
CONFIG_PWM_K64_FTM_0 K64 FTM PWM Module 0
CONFIG_PWM_K64_FTM_0_DEV_NAME K64 FTM PWM Module 0 Device Name
CONFIG_PWM_K64_FTM_0_PRESCALE K64 FTM0 prescale value
CONFIG_PWM_K64_FTM_0_PERIOD K64 FTM0 period value
CONFIG_PWM_K64_FTM_0_CLOCK_SOURCE_NONE No clock selected (FTM counter disable)
CONFIG_PWM_K64_FTM_0_CLOCK_SOURCE_SYSTEM System clock
CONFIG_PWM_K64_FTM_0_CLOCK_SOURCE_FIXED Fixed Frequency Clock
CONFIG_PWM_K64_FTM_0_CLOCK_SOURCE_EXTERNAL External Clock
CONFIG_PWM_K64_FTM_0_CLOCK_SOURCE_QUAD Quadrature Decoder
CONFIG_PWM_K64_FTM_0_CLOCK_SOURCE  
CONFIG_PWM_K64_FTM_0_PHASE_ENABLE_0 FTM0 Enable Phase for channel 0
CONFIG_PWM_K64_FTM_0_PHASE_ENABLE_2 FTM0 Enable Phase for channel 2
CONFIG_PWM_K64_FTM_0_PHASE_ENABLE_4 FTM0 Enable Phase for channel 4
CONFIG_PWM_K64_FTM_0_PHASE_ENABLE_6 FTM0 Enable Phase for channel 6
CONFIG_PWM_K64_FTM_1 K64 FTM PWM Module 1
CONFIG_PWM_K64_FTM_1_DEV_NAME K64 FTM PWM Module 1 Device Name
CONFIG_PWM_K64_FTM_1_PRESCALE FTM1 prescale value
CONFIG_PWM_K64_FTM_1_PERIOD FTM1 period value
CONFIG_PWM_K64_FTM_1_CLOCK_SOURCE_NONE No clock selected (FTM counter disable)
CONFIG_PWM_K64_FTM_1_CLOCK_SOURCE_SYSTEM System clock
CONFIG_PWM_K64_FTM_1_CLOCK_SOURCE_FIXED Fixed Frequency Clock
CONFIG_PWM_K64_FTM_1_CLOCK_SOURCE_EXTERNAL External Clock
CONFIG_PWM_K64_FTM_1_CLOCK_SOURCE_QUAD Quadrature Decoder
CONFIG_PWM_K64_FTM_1_CLOCK_SOURCE  
CONFIG_PWM_K64_FTM_1_PHASE_ENABLE_0 FTM1 Enable Phase for channel 0
CONFIG_PWM_FTM_1_PHASE_ENABLE_2 FTM1 Enable Phase for channel 2
CONFIG_PWM_FTM_1_PHASE_ENABLE_4 FTM1 Enable Phase for channel 4
CONFIG_PWM_FTM_1_PHASE_ENABLE_6 FTM1 Enable Phase for channel 6
CONFIG_PWM_K64_FTM_2 K64 FTM PWM Module 2
CONFIG_PWM_K64_FTM_2_DEV_NAME K64 FTM PWM Module 2 Device Name
CONFIG_PWM_K64_FTM_2_PRESCALE FTM2 prescale value
CONFIG_PWM_K64_FTM_2_PERIOD FTM2 period value
CONFIG_PWM_K64_FTM_2_CLOCK_SOURCE_NONE No clock selected (FTM counter disable)
CONFIG_PWM_K64_FTM_2_CLOCK_SOURCE_SYSTEM System clock
CONFIG_PWM_K64_FTM_2_CLOCK_SOURCE_FIXED Fixed Frequency Clock
CONFIG_PWM_K64_FTM_2_CLOCK_SOURCE_EXTERNAL External Clock
CONFIG_PWM_K64_FTM_2_CLOCK_SOURCE_QUAD Quadrature Decoder
CONFIG_PWM_K64_FTM_2_CLOCK_SOURCE  
CONFIG_PWM_K64_FTM_2_PHASE_ENABLE_0 FTM2 Enable Phase for channel 0
CONFIG_PWM_K64_FTM_2_PHASE_ENABLE_2 FTM2 Enable Phase for channel 2
CONFIG_PWM_K64_FTM_2_PHASE_ENABLE_4 FTM2 Enable Phase for channel 4
CONFIG_PWM_K64_FTM_2_PHASE_ENABLE_6 FTM2 Enable Phase for channel 6
CONFIG_PWM_K64_FTM_3 K64 FTM PWM Module 3
CONFIG_PWM_K64_FTM_3_DEV_NAME K64 FTM PWM Module 3 Device Name
CONFIG_PWM_K64_FTM_3_PRESCALE FTM3 prescale value
CONFIG_PWM_K64_FTM_3_PERIOD FTM3 period value
CONFIG_PWM_K64_FTM_3_CLOCK_SOURCE_NONE No clock selected (FTM counter disable)
CONFIG_PWM_K64_FTM_3_CLOCK_SOURCE_SYSTEM System clock
CONFIG_PWM_K64_FTM_3_CLOCK_SOURCE_FIXED Fixed Frequency Clock
CONFIG_PWM_K64_FTM_3_CLOCK_SOURCE_EXTERNAL External Clock
CONFIG_PWM_K64_FTM_3_CLOCK_SOURCE_QUAD Quadrature Decoder
CONFIG_PWM_K64_FTM_3_CLOCK_SOURCE  
CONFIG_PWM_K64_FTM_3_PHASE_ENABLE_0 FTM3 Enable Phase for channel 0
CONFIG_PWM_K64_FTM_3_PHASE_ENABLE_2 FTM3 Enable Phase for channel 2
CONFIG_PWM_K64_FTM_3_PHASE_ENABLE_4 FTM3 Enable Phase for channel 4
CONFIG_PWM_K64_FTM_3_PHASE_ENABLE_6 FTM3 Enable Phase for channel 6
CONFIG_PINMUX Enable platform pinmux driver
CONFIG_PINMUX_DEV Configure pinmux for early board testing
CONFIG_PINMUX_DEV_NAME Configure pinmux for early board testing
CONFIG_PINMUX_DEV_ATMEL_SAM3X Enable pinmux dev driver for Atmel SAM3X boards
CONFIG_PINMUX_DEV_FRDM_K64F Enable the pinmux dev driver for Freescale FRDM K64F
CONFIG_PINMUX_DEV_GALILEO Enable pinmux dev driver for Galileo
CONFIG_PINMUX_DEV_QUARK_MCU Enable the generic pinmux dev driver for Quark MCUs
CONFIG_PINMUX_DEV_QMSI Enable QMSI pinmux dev driver
CONFIG_PINMUX_DEV_STM32 Enable pinmux dev driver for the ST STM32 family.
CONFIG_PINMUX_NAME Pinmux driver name
CONFIG_PINMUX_INIT_PRIORITY Init priority
CONFIG_PINMUX_K64 Freescale K64-based Pin multiplexer driver
CONFIG_PINMUX_K64_GPIO_A_NAME Name of the Port A GPIO
CONFIG_PINMUX_K64_GPIO_B_NAME Name of the Port B GPIO
CONFIG_PINMUX_K64_GPIO_C_NAME Name of the Port C GPIO
CONFIG_PINMUX_K64_GPIO_D_NAME Name of the Port D GPIO
CONFIG_PINMUX_K64_GPIO_E_NAME Name of the Port E GPIO
CONFIG_PINMUX_STM32 Pinmux driver for STM32 MCUs
CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY Device initialization priority STM32 pinmux
CONFIG_ADC ADC drivers
CONFIG_ADC_DEBUG ADC drivers debug output
CONFIG_ADC_INIT_PRIORITY Init priority
CONFIG_ADC_0_NAME ADC Driver’s name
CONFIG_ADC_0_IRQ_PRI ADC interrupt priority
CONFIG_ADC_TI_ADC108S102 TI adc108s102 chip driver
CONFIG_ADC_TI_ADC108S102_SPI_PORT_NAME Master SPI port name
CONFIG_ADC_TI_ADC108S102_SPI_CONFIGURATION Master SPI port configuration
CONFIG_ADC_TI_ADC108S102_SPI_MAX_FREQ Master SPI port max frequency
CONFIG_ADC_TI_ADC108S102_SPI_SLAVE SPI slave slot
CONFIG_ADC_DW ARC Designware Driver
CONFIG_ADC_DW_CALIBRATION Enable Calibration
CONFIG_ADC_DW_DUMMY_CONVERSION Enable dummy conversion
CONFIG_ADC_DW_SERIAL Serial
CONFIG_ADC_DW_PARALLEL Parallel
CONFIG_ADC_DW_SINGLESHOT Single Ended
CONFIG_ADC_DW_REPETITIVE Differential
CONFIG_ADC_DW_RISING_EDGE Rising Edge
CONFIG_ADC_DW_FALLING_EDGE Falling Edge
CONFIG_ADC_DW_SAMPLE_WIDTH Sample Width
CONFIG_ADC_DW_SERIAL_DELAY Serial Delay
CONFIG_ADC_DW_CLOCK_RATIO Clock Ratio
CONFIG_ADC_QMSI QMSI ADC Driver
CONFIG_ADC_QMSI_SS QMSI ADC Driver for the Sensor Subsystem
CONFIG_ADC_QMSI_POLL Polling samples
CONFIG_ADC_QMSI_INTERRUPT Interrupt notification
CONFIG_ADC_QMSI_CALIBRATION Enable Calibration
CONFIG_ADC_QMSI_CLOCK_RATIO Clock Ratio
CONFIG_ADC_QMSI_SERIAL_DELAY Serial Delay
CONFIG_ADC_QMSI_SAMPLE_WIDTH Sample Width
CONFIG_RTC Real-Time Clock
CONFIG_RTC_QMSI QMSI RTC Driver
CONFIG_RTC_0_NAME Driver instance name
CONFIG_RTC_0_IRQ_PRI RTC Driver Interrupt priority
CONFIG_WATCHDOG Watchdog Support
CONFIG_WDT_QMSI QMSI Watchdog driver
CONFIG_WDT_0_NAME Watchdog driver instance name
CONFIG_WDT_0_IRQ_PRI Interrupt priority
CONFIG_IWDG_STM32 Independent Watchdog (IWDG) Driver for STM32 family of MCUs
CONFIG_IWDG_STM32_PRESCALER Prescaler divider for clock feeding the IWDG
CONFIG_IWDG_STM32_RELOAD_COUNTER Value for IWDG counter
CONFIG_IWDG_STM32_START_AT_BOOT Start IWDG during boot
CONFIG_IWDG_STM32_DEVICE_NAME Device name for Independent Watchdog (IWDG)
CONFIG_CLOCK_CONTROL Hardware clock controller support
CONFIG_CLOCK_CONTROL_DEBUG Hardware clock controller drivers debug output
CONFIG_CLOCK_CONTROL_QUARK_SE Quark SE Clock controller support
CONFIG_CLOCK_CONTROL_QUARK_SE_PERIPHERAL Quark SE peripheral clock support
CONFIG_CLOCK_CONTROL_QUARK_SE_PERIPHERAL_DRV_NAME Quark SE peripheral clock device name
CONFIG_CLOCK_CONTROL_QUARK_SE_EXTERNAL Quark SE external clock support
CONFIG_CLOCK_CONTROL_QUARK_SE_EXTERNAL_DRV_NAME Quark SE external clock device name
CONFIG_CLOCK_CONTROL_QUARK_SE_SENSOR Quark SE sensor clock support
CONFIG_CLOCK_CONTROL_QUARK_SE_SENSOR_DRV_NAME Quark SE sensor clock device name
CONFIG_CLOCK_CONTROL_STM32F10X STM32F10x Reset & Clock Control
CONFIG_CLOCK_CONTROL_STM32F10X_DEVICE_INIT_PRIORITY Clock Control Device Priority
CONFIG_CLOCK_STM32F10X_SYSCLK_SRC_HSI HSI
CONFIG_CLOCK_STM32F10X_SYSCLK_SRC_HSE HSE
CONFIG_CLOCK_STM32F10X_SYSCLK_SRC_PLL PLL
CONFIG_CLOCK_STM32F10X_PLL_SRC_HSI HSI
CONFIG_CLOCK_STM32F10X_PLL_SRC_HSE HSE
CONFIG_CLOCK_STM32F10X_HSE_BYPASS HSE bypass
CONFIG_CLOCK_STM32F10X_PLL_XTPRE HSE to PLL /2 prescaler
CONFIG_CLOCK_STM32F10X_PLL_MULTIPLIER PLL multiplier
CONFIG_CLOCK_STM32F10X_AHB_PRESCALER AHB prescaler
CONFIG_CLOCK_STM32F10X_APB1_PRESCALER APB1 prescaler
CONFIG_CLOCK_STM32F10X_APB2_PRESCALER APB2 prescaler
CONFIG_IPM IPM drivers
CONFIG_IPM_QUARK_SE Quark SE IPM driver
CONFIG_IPM_QUARK_SE_MASTER Quark SE IPM master controller
CONFIG_AIO_COMPARATOR AIO/Comparator Configuration
CONFIG_AIO_COMPARATOR_QMSI Enable QMSI AIO/comparator driver
CONFIG_AIO_COMPARATOR_0_NAME Device name for AIO/comparator
CONFIG_AIO_COMPARATOR_0_IRQ_PRI IRQ Priority for AIO/comparator
CONFIG_FLASH flash hardware support
CONFIG_SPI_FLASH_W25QXXDV SPI NOR Flash Winbond W25QXXDV
CONFIG_SPI_FLASH_W25QXXDV_SPI_NAME spi controller device name
CONFIG_SPI_FLASH_W25QXXDV_DRV_NAME spi flash device name
CONFIG_SPI_FLASH_W25QXXDV_INIT_PRIORITY  
CONFIG_SPI_FLASH_W25QXXDV_SPI_FREQ_0 SPI system frequency
CONFIG_SPI_FLASH_W25QXXDV_SPI_SLAVE SPI slave linked to spi flash
CONFIG_SPI_FLASH_W25QXXDV_FLASH_SIZE flash size in bytes
CONFIG_SPI_FLASH_W25QXXDV_MAX_DATA_LEN  
CONFIG_SOC_FLASH_QMSI QMSI flash driver
CONFIG_SOC_FLASH_QMSI_DEV_NAME QMSI flash device name
CONFIG_SOC_FLASH_QMSI_CLK_COUNT_US system clk count per microsecond
CONFIG_SOC_FLASH_QMSI_WAIT_STATES The number of flash wait states
CONFIG_SOC_FLASH_QMSI_SYS_SIZE SOC system flash size
CONFIG_SENSOR Sensor Drivers
CONFIG_AK8975 AK8975 Magnetometer
CONFIG_AK8975_SYS_LOG_LEVEL AK8975 Log level
CONFIG_AK8975_NAME Driver name
CONFIG_AK8975_INIT_PRIORITY Init priority
CONFIG_AK8975_I2C_ADDR I2C address
CONFIG_AK8975_I2C_MASTER_DEV_NAME I2C master where AK8975 is connected
CONFIG_MPU9150 Enable MPU9180 support
CONFIG_MPU9150_I2C_ADDR MPU9180 I2C address
CONFIG_BMA280 BMA280 Three Axis Accelerometer Family
CONFIG_BMA280_SYS_LOG_LEVEL BMA280 Gyro Log level
CONFIG_BMA280_CHIP_BMA280 BMA280
CONFIG_BMA280_CHIP_BMC150_ACCEL BMC150_ACCEL
CONFIG_BMA280_NAME Driver name
CONFIG_BMA280_INIT_PRIORITY Init priority
CONFIG_BMA280_I2C_ADDR_0x10 0x10
CONFIG_BMA280_I2C_ADDR_0x11 0x11
CONFIG_BMA280_I2C_ADDR_0x18 0x18
CONFIG_BMA280_I2C_ADDR_0x19 0x19
CONFIG_BMA280_I2C_MASTER_DEV_NAME I2C master device name
CONFIG_BMA280_TRIGGER_NONE No trigger
CONFIG_BMA280_TRIGGER_GLOBAL_FIBER Use global fiber
CONFIG_BMA280_TRIGGER_OWN_FIBER Use own fiber
CONFIG_BMA280_TRIGGER  
CONFIG_BMA280_GPIO_DEV_NAME GPIO device
CONFIG_BMA280_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_BMA280_FIBER_PRIORITY Fiber priority
CONFIG_BMA280_FIBER_STACK_SIZE Fiber stack size
CONFIG_BMA280_PMU_RANGE_2G +/-2g
CONFIG_BMA280_PMU_RANGE_4G +/-4g
CONFIG_BMA280_PMU_RANGE_8G +/-8g
CONFIG_BMA280_PMU_RANGE_16G +/-16g
CONFIG_BMA280_PMU_BW_1 7.81Hz
CONFIG_BMA280_PMU_BW_2 15.63HZ
CONFIG_BMA280_PMU_BW_3 31.25Hz
CONFIG_BMA280_PMU_BW_4 62.5Hz
CONFIG_BMA280_PMU_BW_5 125Hz
CONFIG_BMA280_PMU_BW_6 250HZ
CONFIG_BMA280_PMU_BW_7 500Hz
CONFIG_BMA280_PMU_BW_8 unfiltered
CONFIG_BMC150_MAGN BMC150_MAGN I2C Magnetometer Chip
CONFIG_BMC150_MAGN_SYS_LOG_LEVEL BMC150 Magnetometer Log level
CONFIG_BMC150_MAGN_DEV_NAME BMC150_MAGN device name
CONFIG_BMC150_MAGN_INIT_PRIORITY Init priority
CONFIG_BMC150_MAGN_I2C_ADDR_12 0x12 (GND)
CONFIG_BMC150_MAGN_I2C_ADDR_13 0x13 (VCC)
CONFIG_BMC150_MAGN_I2C_MASTER_DEV_NAME I2C master where BMC150_MAGN is connected
CONFIG_BMC150_MAGN_PRESET_LOW_POWER Low power (3, 3, 10)
CONFIG_BMC150_MAGN_PRESET_REGULAR Regular (9, 15, 10)
CONFIG_BMC150_MAGN_PRESET_ENHANCED_REGULAR Enhanced regular (15, 27, 10)
CONFIG_BMC150_MAGN_PRESET_HIGH_ACCURACY High accuracy (47, 83, 20)
CONFIG_BMC150_MAGN_SAMPLING_RATE_RUNTIME Enable dynamic sampling rate
CONFIG_BMC150_MAGN_SAMPLING_REP_XY Enable dynamic XY oversampling
CONFIG_BMC150_MAGN_SAMPLING_REP_Z Enable dynamic Z oversampling
CONFIG_BMC150_MAGN_TRIGGER Enable triggers
CONFIG_BMC150_MAGN_TRIGGER_FIBER_STACK Fiber stack size
CONFIG_BMC150_MAGN_TRIGGER_DRDY Enable data ready trigger
CONFIG_BMC150_MAGN_GPIO_DRDY_DEV_NAME GPIO device where BMC150_MAGN data ready interrupt is connected
CONFIG_BMC150_MAGN_GPIO_DRDY_INT_PIN GPIO pin number for the data ready interrupt pin
CONFIG_BME280 BME280/BMP280 sensor
CONFIG_BME280_SYS_LOG_LEVEL BME280 Log level
CONFIG_BME280_DEV_NAME BME280 device name
CONFIG_BME280_INIT_PRIORITY Init priority
CONFIG_BME280_I2C_ADDR_76 0x76 (GND)
CONFIG_BME280_I2C_ADDR_77 0x77 (VCC)
CONFIG_BME280_I2C_MASTER_DEV_NAME I2C master where BME280 is connected
CONFIG_BME280_TEMP_OVER_1X x1
CONFIG_BME280_TEMP_OVER_2X x2
CONFIG_BME280_TEMP_OVER_4X x4
CONFIG_BME280_TEMP_OVER_8X x8
CONFIG_BME280_TEMP_OVER_16X x16
CONFIG_BME280_PRESS_OVER_1X x1
CONFIG_BME280_PRESS_OVER_2X x2
CONFIG_BME280_PRESS_OVER_4X x4
CONFIG_BME280_PRESS_OVER_8X x8
CONFIG_BME280_PRESS_OVER_16X x16
CONFIG_BME280_HUMIDITY_OVER_1X x1
CONFIG_BME280_HUMIDITY_OVER_2X x2
CONFIG_BME280_HUMIDITY_OVER_4X x4
CONFIG_BME280_HUMIDITY_OVER_8X x8
CONFIG_BME280_HUMIDITY_OVER_16X x16
CONFIG_BME280_STANDBY_05MS 0.5ms
CONFIG_BME280_STANDBY_62MS 62.5ms
CONFIG_BME280_STANDBY_125MS 125ms
CONFIG_BME280_STANDBY_250MS 250ms
CONFIG_BME280_STANDBY_500MS 500ms
CONFIG_BME280_STANDBY_1000MS 1000ms
CONFIG_BME280_STANDBY_2000MS 2000ms BMP280 / 10ms BME280
CONFIG_BME280_STANDBY_4000MS 4000ms BMP280 / 20ms BME280
CONFIG_BME280_FILTER_OFF filter off
CONFIG_BME280_FILTER_2 2
CONFIG_BME280_FILTER_4 4
CONFIG_BME280_FILTER_8 8
CONFIG_BME280_FILTER_16 16
CONFIG_BMG160 Bosch BMG160 gyroscope support
CONFIG_BMG160_SYS_LOG_LEVEL BMG160 Log level
CONFIG_BMG160_INIT_PRIORITY BMG160 Init priority
CONFIG_BMG160_DRV_NAME Driver’s name
CONFIG_BMG160_I2C_PORT_NAME I2C master controller port name
CONFIG_BMG160_I2C_ADDR BMG160 I2C address
CONFIG_BMG160_I2C_SPEED_STANDARD Standard
CONFIG_BMG160_I2C_SPEED_FAST Fast
CONFIG_BMG160_TRIGGER_NONE No trigger
CONFIG_BMG160_TRIGGER_GLOBAL_FIBER Use global fiber
CONFIG_BMG160_TRIGGER_OWN_FIBER Use own fiber
CONFIG_BMG160_TRIGGER  
CONFIG_BMG160_FIBER_PRIORITY Own fiber priority
CONFIG_BMG160_FIBER_STACK_SIZE Own fiber stack size
CONFIG_BMG160_GPIO_PORT_NAME GPIO controller port name
CONFIG_BMG160_INT_PIN BMG160 INT PIN
CONFIG_BMG160_RANGE_RUNTIME Set at runtime.
CONFIG_BMG160_RANGE_2000DPS 2000 DPS
CONFIG_BMG160_RANGE_1000DPS 1000 DPS
CONFIG_BMG160_RANGE_500DPS 500 DPS
CONFIG_BMG160_RANGE_250DPS 250 DPS
CONFIG_BMG160_RANGE_125DPS 125 DPS
CONFIG_BMG160_ODR_RUNTIME Set at runtime.
CONFIG_BMG160_ODR_100 100 Hz
CONFIG_BMG160_ODR_200 200 Hz
CONFIG_BMG160_ODR_400 400 Hz
CONFIG_BMG160_ODR_1000 1000 Hz
CONFIG_BMG160_ODR_2000 2000 Hz
CONFIG_BMI160 Bosch BMI160 inertial measurement unit
CONFIG_BMI160_SYS_LOG_LEVEL BMI160 Log level
CONFIG_BMI160_INIT_PRIORITY BMI160 Init priority
CONFIG_BMI160_NAME Driver’s name
CONFIG_BMI160_SPI_PORT_NAME SPI master controller port name
CONFIG_BMI160_SLAVE BMI160 SPI slave select pin
CONFIG_BMI160_SPI_BUS_FREQ BMI160 SPI bus speed in Hz
CONFIG_BMI160_TRIGGER_NONE No trigger
CONFIG_BMI160_TRIGGER_GLOBAL_FIBER Use global fiber
CONFIG_BMI160_TRIGGER_OWN_FIBER Use own fiber
CONFIG_BMI160_TRIGGER  
CONFIG_BMI160_TRIGGER_SOURCE_IPM IPM device
CONFIG_BMI160_TRIGGER_SOURCE_GPIO GPIO device
CONFIG_BMI160_FIBER_PRIORITY Own fiber priority
CONFIG_BMI160_FIBER_STACK_SIZE Own fiber stack size
CONFIG_BMI160_GPIO_DEV_NAME Gpio device
CONFIG_BMI160_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_BMI160_ACCEL_PMU_RUNTIME Set at runtime.
CONFIG_BMI160_ACCEL_PMU_SUSPEND suspended/not used
CONFIG_BMI160_ACCEL_PMU_NORMAL normal
CONFIG_BMI160_ACCEL_PMU_LOW_POWER low power
CONFIG_BMI160_ACCEL_RANGE_RUNTIME Set at runtime.
CONFIG_BMI160_ACCEL_RANGE_2G 2G
CONFIG_BMI160_ACCEL_RANGE_4G 4G
CONFIG_BMI160_ACCEL_RANGE_8G 8G
CONFIG_BMI160_ACCEL_RANGE_16G 16G
CONFIG_BMI160_ACCEL_ODR_RUNTIME Set at runtime.
CONFIG_BMI160_ACCEL_ODR_25_32 0.78 Hz
CONFIG_BMI160_ACCEL_ODR_25_16 1.56 Hz
CONFIG_BMI160_ACCEL_ODR_25_8 3.125 Hz
CONFIG_BMI160_ACCEL_ODR_25_4 6.25 Hz
CONFIG_BMI160_ACCEL_ODR_25_2 12.5 Hz
CONFIG_BMI160_ACCEL_ODR_25 25 Hz
CONFIG_BMI160_ACCEL_ODR_50 50 Hz
CONFIG_BMI160_ACCEL_ODR_100 100 Hz
CONFIG_BMI160_ACCEL_ODR_200 200 Hz
CONFIG_BMI160_ACCEL_ODR_400 400 Hz
CONFIG_BMI160_ACCEL_ODR_800 800 Hz
CONFIG_BMI160_ACCEL_ODR_1600 1600 Hz
CONFIG_BMI160_GYRO_PMU_RUNTIME Set at runtime.
CONFIG_BMI160_GYRO_PMU_SUSPEND suspended/not used
CONFIG_BMI160_GYRO_PMU_NORMAL normal
CONFIG_BMI160_GYRO_PMU_FAST_STARTUP fast start-up
CONFIG_BMI160_GYRO_RANGE_RUNTIME Set at runtime.
CONFIG_BMI160_GYRO_RANGE_2000DPS 2000 DPS
CONFIG_BMI160_GYRO_RANGE_1000DPS 1000 DPS
CONFIG_BMI160_GYRO_RANGE_500DPS 500 DPS
CONFIG_BMI160_GYRO_RANGE_250DPS 250 DPS
CONFIG_BMI160_GYRO_RANGE_125DPS 125 DPS
CONFIG_BMI160_GYRO_ODR_RUNTIME Set at runtime.
CONFIG_BMI160_GYRO_ODR_25 25 Hz
CONFIG_BMI160_GYRO_ODR_50 50 Hz
CONFIG_BMI160_GYRO_ODR_100 100 Hz
CONFIG_BMI160_GYRO_ODR_200 200 Hz
CONFIG_BMI160_GYRO_ODR_400 400 Hz
CONFIG_BMI160_GYRO_ODR_800 800 Hz
CONFIG_BMI160_GYRO_ODR_1600 1600 Hz
CONFIG_BMI160_GYRO_ODR_3200 3200 Hz
CONFIG_DHT DHT Temperature and Humidity Sensor
CONFIG_DHT_SYS_LOG_LEVEL DHT Log level
CONFIG_DHT_CHIP_DHT11 DHT11
CONFIG_DHT_CHIP_DHT22 DHT22
CONFIG_DHT_NAME Driver name
CONFIG_DHT_INIT_PRIORITY Init priority
CONFIG_DHT_GPIO_DEV_NAME GPIO device
CONFIG_DHT_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_HDC1008 HDC1008 Temperature and Humidity Sensor
CONFIG_HDC1008_SYS_LOG_LEVEL HDC1008 Log level
CONFIG_HDC1008_NAME Driver name
CONFIG_HDC1008_INIT_PRIORITY Init priority
CONFIG_HDC1008_I2C_ADDR_0 0x40
CONFIG_HDC1008_I2C_ADDR_1 0x41
CONFIG_HDC1008_I2C_ADDR_2 0x42
CONFIG_HDC1008_I2C_ADDR_3 0x43
CONFIG_HDC1008_I2C_MASTER_DEV_NAME I2C master where HDC1008 is connected
CONFIG_HDC1008_GPIO_DEV_NAME GPIO device
CONFIG_HDC1008_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_HTS221 HTS221 temperature and humidity sensor
CONFIG_HTS221_SYS_LOG_LEVEL HTS221 Log level
CONFIG_HTS221_NAME Driver name
CONFIG_HTS221_INIT_PRIORITY Init priority
CONFIG_HTS221_I2C_MASTER_DEV_NAME I2C master where HTS221 is connected
CONFIG_HTS221_TRIGGER_NONE No trigger
CONFIG_HTS221_TRIGGER_GLOBAL_FIBER Use global fiber
CONFIG_HTS221_TRIGGER_OWN_FIBER Use own fiber
CONFIG_HTS221_TRIGGER  
CONFIG_HTS221_GPIO_DEV_NAME GPIO device
CONFIG_HTS221_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_HTS221_FIBER_PRIORITY Fiber priority
CONFIG_HTS221_FIBER_STACK_SIZE Fiber stack size
CONFIG_HTS221_ODR Output data rate
CONFIG_ISL29035 ISL29035 light sensor
CONFIG_ISL29035_SYS_LOG_LEVEL ISL29035 Log level
CONFIG_ISL29035_NAME Driver name
CONFIG_ISL29035_INIT_PRIORITY Init priority
CONFIG_ISL29035_I2C_MASTER_DEV_NAME I2C Master
CONFIG_ISL29035_FIBER_PRIORITY Fiber priority
CONFIG_ISL29035_LUX_RANGE_1K 1000
CONFIG_ISL29035_LUX_RANGE_4K 4000
CONFIG_ISL29035_LUX_RANGE_16K 16000
CONFIG_ISL29035_LUX_RANGE_64K 64000
CONFIG_ISL29035_INTEGRATION_TIME_26 0.0256 ms
CONFIG_ISL29035_INTEGRATION_TIME_410 0.41 ms
CONFIG_ISL29035_INTEGRATION_TIME_6500 6.5 ms
CONFIG_ISL29035_INTEGRATION_TIME_105K 105 ms
CONFIG_ISL29035_MODE_ALS ambient light
CONFIG_ISL29035_MODE_IR infrared
CONFIG_ISL29035_TRIGGER_NONE No trigger
CONFIG_ISL29035_TRIGGER_GLOBAL_FIBER Use global fiber
CONFIG_ISL29035_TRIGGER_OWN_FIBER Use own fiber
CONFIG_ISL29035_TRIGGER  
CONFIG_ISL29035_GPIO_DEV_NAME GPIO device
CONFIG_ISL29035_GPIO_PIN_NUM GPIO pin number
CONFIG_ISL29035_FIBER_STACK_SIZE Fiber stack size
CONFIG_ISL29035_INT_PERSIST_1 1
CONFIG_ISL29035_INT_PERSIST_4 4
CONFIG_ISL29035_INT_PERSIST_8 8
CONFIG_ISL29035_INT_PERSIST_16 16
CONFIG_LIS3DH LIS3DH Three Axis Accelerometer
CONFIG_LIS3DH_SYS_LOG_LEVEL LIS3DH Log level
CONFIG_LIS3DH_NAME Driver name
CONFIG_LIS3DH_INIT_PRIORITY Init priority
CONFIG_LIS3DH_I2C_ADDR_0x18 0x18
CONFIG_LIS3DH_I2C_ADDR_0x19 0x19
CONFIG_LIS3DH_I2C_MASTER_DEV_NAME I2C master where LIS3DH is connected
CONFIG_LIS3DH_TRIGGER_NONE No trigger
CONFIG_LIS3DH_TRIGGER_GLOBAL_FIBER Use global fiber
CONFIG_LIS3DH_TRIGGER_OWN_FIBER Use own fiber
CONFIG_LIS3DH_TRIGGER  
CONFIG_LIS3DH_GPIO_DEV_NAME GPIO device
CONFIG_LIS3DH_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_LIS3DH_FIBER_PRIORITY Fiber priority
CONFIG_LIS3DH_FIBER_STACK_SIZE Fiber stack size
CONFIG_LIS3DH_ACCEL_RANGE_2G +/-2g
CONFIG_LIS3DH_ACCEL_RANGE_4G +/-4g
CONFIG_LIS3DH_ACCEL_RANGE_8G +/-8g
CONFIG_LIS3DH_ACCEL_RANGE_16G +/-16g
CONFIG_LIS3DH_POWER_MODE_NORMAL normal
CONFIG_LIS3DH_POWER_MODE_LOW low
CONFIG_LIS3DH_ODR_1 1Hz
CONFIG_LIS3DH_ODR_2 10Hz
CONFIG_LIS3DH_ODR_3 25Hz
CONFIG_LIS3DH_ODR_4 50Hz
CONFIG_LIS3DH_ODR_5 100Hz
CONFIG_LIS3DH_ODR_6 200Hz
CONFIG_LIS3DH_ODR_7 400Hz
CONFIG_LIS3DH_ODR_8 1.6KHz
CONFIG_LIS3DH_ODR_9_NORMAL 1.25KHz
CONFIG_LIS3DH_ODR_9_LOW 5KHz
CONFIG_LIS3MDL LIS3MDL magnetometer
CONFIG_LIS3MDL_SYS_LOG_LEVEL LIS3MDL Log level
CONFIG_LIS3MDL_NAME Driver name
CONFIG_LIS3MDL_INIT_PRIORITY Init priority
CONFIG_LIS3MDL_I2C_ADDR I2C address
CONFIG_LIS3MDL_I2C_MASTER_DEV_NAME I2C master where LIS3MDL is connected
CONFIG_LIS3MDL_TRIGGER_NONE No trigger
CONFIG_LIS3MDL_TRIGGER_GLOBAL_FIBER Use global fiber
CONFIG_LIS3MDL_TRIGGER_OWN_FIBER Use own fiber
CONFIG_LIS3MDL_TRIGGER  
CONFIG_LIS3MDL_GPIO_DEV_NAME GPIO device
CONFIG_LIS3MDL_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_LIS3MDL_FIBER_PRIORITY Fiber priority
CONFIG_LIS3MDL_FIBER_STACK_SIZE Fiber stack size
CONFIG_LIS3MDL_ODR Output data rate
CONFIG_LIS3MDL_FS Full-scale range
CONFIG_LSM6DS0 LSM6DS0 I2C accelerometer and gyroscope Chip
CONFIG_LSM6DS0_SYS_LOG_LEVEL LSM6DS0 Log level
CONFIG_LSM6DS0_DEV_NAME LSM6DS0 device name
CONFIG_LSM6DS0_INIT_PRIORITY Init priority
CONFIG_LSM6DS0_I2C_ADDR I2C address
CONFIG_LSM6DS0_I2C_MASTER_DEV_NAME I2C master where LSM6DS0 chip is connected
CONFIG_LSM6DS0_ACCEL_ENABLE_X_AXIS Enable accelerometer X axis
CONFIG_LSM6DS0_ACCEL_ENABLE_Y_AXIS Enable accelerometer Y axis
CONFIG_LSM6DS0_ACCEL_ENABLE_Z_AXIS Enable accelerometer Z axis
CONFIG_LSM6DS0_GYRO_ENABLE_X_AXIS Enable gyroscope X axis
CONFIG_LSM6DS0_GYRO_ENABLE_Y_AXIS Enable gyroscope Y axis
CONFIG_LSM6DS0_GYRO_ENABLE_Z_AXIS Enable gyroscope Z axis
CONFIG_LSM6DS0_ENABLE_TEMP Enable temperature
CONFIG_LSM6DS0_GYRO_FULLSCALE Gyroscope full-scale range
CONFIG_LSM6DS0_GYRO_SAMPLING_RATE Output data rate
CONFIG_LSM6DS0_ACCEL_FULLSCALE Accelerometer full-scale range
CONFIG_LSM6DS0_ACCEL_SAMPLING_RATE Output data rate
CONFIG_LSM9DS0_GYRO LSM9DS0 I2C gyroscope Chip
CONFIG_LSM9DS0_GYRO_SYS_LOG_LEVEL LSM9DS0 Gyro Log level
CONFIG_LSM9DS0_GYRO_DEV_NAME LSM9DS0_GYRO device name
CONFIG_LSM9DS0_GYRO_INIT_PRIORITY Init priority
CONFIG_LSM9DS0_GYRO_I2C_ADDR_6A 0x6A (GND)
CONFIG_LSM9DS0_GYRO_I2C_ADDR_6B 0x6B (VCC)
CONFIG_LSM9DS0_GYRO_I2C_MASTER_DEV_NAME I2C master where LSM9DS0 gyroscope is connected
CONFIG_LSM9DS0_GYRO_FULLSCALE_245 245 DPS
CONFIG_LSM9DS0_GYRO_FULLSCALE_500 500 DPS
CONFIG_LSM9DS0_GYRO_FULLSCALE_2000 2000 DPS
CONFIG_LSM9DS0_GYRO_FULLSCALE_RUNTIME Enable dynamic full-scale
CONFIG_LSM9DS0_GYRO_SAMPLING_RATE_95 95 Hz
CONFIG_LSM9DS0_GYRO_SAMPLING_RATE_190 190 Hz
CONFIG_LSM9DS0_GYRO_SAMPLING_RATE_380 380 Hz
CONFIG_LSM9DS0_GYRO_SAMPLING_RATE_760 760 Hz
CONFIG_LSM9DS0_GYRO_SAMPLING_RATE_RUNTIME Enable dynamic sampling rate
CONFIG_LSM9DS0_GYRO_TRIGGERS Enable triggers
CONFIG_LSM9DS0_GYRO_FIBER_STACK_SIZE Fiber stack size
CONFIG_LSM9DS0_GYRO_TRIGGER_DRDY Enable data ready trigger
CONFIG_LSM9DS0_GYRO_GPIO_DRDY_DEV_NAME GPIO device where LSM9DS0_GYRO data ready interrupt is connected
CONFIG_LSM9DS0_GYRO_GPIO_DRDY_INT_PIN GPIO pin number for the data ready interrupt pin
CONFIG_LSM9DS0_MFD LSM9DS0 I2C accelerometer, magnetometer and temperature sensor chip
CONFIG_LSM9DS0_MFD_SYS_LOG_LEVEL LSM9DS0 MFD Log level
CONFIG_LSM9DS0_MFD_DEV_NAME LSM9DS0_MFD device name
CONFIG_LSM9DS0_MFD_INIT_PRIORITY Init priority
CONFIG_LSM9DS0_MFD_I2C_ADDR_1E 0x1E (GND)
CONFIG_LSM9DS0_MFD_I2C_ADDR_1F 0x1F (VCC)
CONFIG_LSM9DS0_MFD_I2C_MASTER_DEV_NAME I2C master where LSM9DS0 gyroscope is connected
CONFIG_LSM9DS0_MFD_ACCEL_ENABLE Enable accelerometer
CONFIG_LSM9DS0_MFD_MAGN_ENABLE Enable magnetometer
CONFIG_LSM9DS0_MFD_TEMP_ENABLE Enable temperature sensor
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_0 0 Hz (power down)
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_3_125 3.125 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_6_25 6.25 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_12_5 12.5 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_25 25 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_50 50 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_100 100 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_200 200 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_400 400 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_800 800 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_1600 1600 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_RUNTIME Enable dynamic sampling rate for accelerometer
CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_2 2G
CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_4 4G
CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_6 6G
CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_8 8G
CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_16 16G
CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_RUNTIME Enable dynamic full-scale for accelerometer
CONFIG_LSM9DS0_MFD_ACCEL_ENABLE_X Enable accelerometer X axis
CONFIG_LSM9DS0_MFD_ACCEL_ENABLE_Y Enable accelerometer Y axis
CONFIG_LSM9DS0_MFD_ACCEL_ENABLE_Z Enable accelerometer Z axis
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_3_125 3.125 Hz
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_6_25 6.25 Hz
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_12_5 12.5 Hz
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_25 25 Hz
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_50 50 Hz
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_100 100 Hz
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_RUNTIME Enable dynamic sampling rate for magnetometer
CONFIG_LSM9DS0_MFD_MAGN_FULL_SCALE_2 2 Gauss
CONFIG_LSM9DS0_MFD_MAGN_FULL_SCALE_4 4 Gauss
CONFIG_LSM9DS0_MFD_MAGN_FULL_SCALE_8 8 Gauss
CONFIG_LSM9DS0_MFD_MAGN_FULL_SCALE_12 12 Gauss
CONFIG_LSM9DS0_MFD_MAGN_FULL_SCALE_RUNTIME Enable dynamic full-scale for magnetometer
CONFIG_MCP9808 MCP9808 temperature sensor
CONFIG_MCP9808_SYS_LOG_LEVEL MCP9808 Log level
CONFIG_MCP9808_DEV_NAME MCP9808 device name
CONFIG_MCP9808_INIT_PRIORITY Init priority
CONFIG_MCP9808_I2C_ADDR MCP9808 I2C slave address
CONFIG_MCP9808_I2C_DEV_NAME I2C master where MCP9808 is connected
CONFIG_MCP9808_TRIGGER_NONE No trigger
CONFIG_MCP9808_TRIGGER_GLOBAL_FIBER Use global fiber
CONFIG_MCP9808_TRIGGER_OWN_FIBER Use own fiber
CONFIG_MCP9808_TRIGGER  
CONFIG_MCP9808_GPIO_CONTROLLER GPIO controller for MCP9808 interrupt
CONFIG_MCP9808_GPIO_PIN GPIO pin for MCP9808 interrupt
CONFIG_MCP9808_FIBER_STACK_SIZE Sensor delayed work fiber stack size
CONFIG_MCP9808_FIBER_PRIORITY MCP9808 fiber priority
CONFIG_MPU6050 MPU6050 Six-Axis Motion Tracking Device
CONFIG_MPU6050_SYS_LOG_LEVEL MPU6050 Log level
CONFIG_MPU6050_NAME Driver name
CONFIG_MPU6050_INIT_PRIORITY Init priority
CONFIG_MPU6050_I2C_ADDR I2C address
CONFIG_MPU6050_I2C_MASTER_DEV_NAME I2C master where MPU6050 is connected
CONFIG_MPU6050_TRIGGER_NONE No trigger
CONFIG_MPU6050_TRIGGER_GLOBAL_FIBER Use global fiber
CONFIG_MPU6050_TRIGGER_OWN_FIBER Use own fiber
CONFIG_MPU6050_TRIGGER  
CONFIG_MPU6050_GPIO_DEV_NAME GPIO device
CONFIG_MPU6050_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_MPU6050_FIBER_PRIORITY Fiber priority
CONFIG_MPU6050_FIBER_STACK_SIZE Fiber stack size
CONFIG_MPU6050_ACCEL_FS Accelerometer full-scale range
CONFIG_MPU6050_GYRO_FS Gyroscope full-scale range
CONFIG_SHT3XD SHT3xD Temperature and Humidity Sensor
CONFIG_SHT3XD_SYS_LOG_LEVEL SHT3XD Log level
CONFIG_SHT3XD_NAME Driver name
CONFIG_SHT3XD_INIT_PRIORITY Init priority
CONFIG_SHT3XD_I2C_ADDR_A 0x44
CONFIG_SHT3XD_I2C_ADDR_B 0x45
CONFIG_SHT3XD_I2C_MASTER_DEV_NAME I2C master where SHT3xD is connected
CONFIG_SHT3XD_TRIGGER_NONE No trigger
CONFIG_SHT3XD_TRIGGER_GLOBAL_FIBER Use global fiber
CONFIG_SHT3XD_TRIGGER_OWN_FIBER Use own fiber
CONFIG_SHT3XD_TRIGGER  
CONFIG_SHT3XD_GPIO_DEV_NAME GPIO device
CONFIG_SHT3XD_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_SHT3XD_FIBER_PRIORITY Fiber priority
CONFIG_SHT3XD_FIBER_STACK_SIZE Fiber stack size
CONFIG_SHT3XD_REPEATABILITY_LOW low
CONFIG_SHT3XD_REPEATABILITY_MEDIUM medium
CONFIG_SHT3XD_REPEATABILITY_HIGH high
CONFIG_SHT3XD_MPS_05 0.5
CONFIG_SHT3XD_MPS_1 1
CONFIG_SHT3XD_MPS_2 2
CONFIG_SHT3XD_MPS_4 4
CONFIG_SHT3XD_MPS_10 10
CONFIG_SX9500 SX9500 I2C SAR Proximity Chip
CONFIG_SX9500_SYS_LOG_LEVEL SX9500 Log level
CONFIG_SX9500_DEV_NAME SX9500 device name
CONFIG_SX9500_INIT_PRIORITY Init priority
CONFIG_SX9500_I2C_ADDR SX9500 I2C slave address
CONFIG_SX9500_I2C_DEV_NAME I2C master where SX9500 is connected
CONFIG_SX9500_PROX_CHANNEL Proximity channel to use
CONFIG_SX9500_TRIGGER_NONE No trigger
CONFIG_SX9500_TRIGGER_GLOBAL_FIBER Use global fiber
CONFIG_SX9500_TRIGGER_OWN_FIBER Use own fiber
CONFIG_SX9500_TRIGGER  
CONFIG_SX9500_GPIO_CONTROLLER GPIO controller for SX9500 interrupt
CONFIG_SX9500_GPIO_PIN GPIO pin for SX9500 interrupt
CONFIG_SX9500_FIBER_STACK_SIZE Sensor delayed work fiber stack size
CONFIG_SX9500_FIBER_PRIORITY Fiber priority
CONFIG_TMP007 TMP007 Infrared Thermopile Sensor
CONFIG_TMP007_SYS_LOG_LEVEL TMP007 Log level
CONFIG_TMP007_NAME Driver name
CONFIG_TMP007_INIT_PRIORITY Init priority
CONFIG_TMP007_I2C_ADDR_0 0x40
CONFIG_TMP007_I2C_ADDR_1 0x41
CONFIG_TMP007_I2C_ADDR_2 0x42
CONFIG_TMP007_I2C_ADDR_3 0x43
CONFIG_TMP007_I2C_ADDR_4 0x44
CONFIG_TMP007_I2C_ADDR_5 0x45
CONFIG_TMP007_I2C_ADDR_6 0x46
CONFIG_TMP007_I2C_ADDR_7 0x47
CONFIG_TMP007_I2C_MASTER_DEV_NAME I2C master where TMP007 is connected
CONFIG_TMP007_TRIGGER_NONE No trigger
CONFIG_TMP007_TRIGGER_GLOBAL_FIBER Use global fiber
CONFIG_TMP007_TRIGGER_OWN_FIBER Use own fiber
CONFIG_TMP007_TRIGGER  
CONFIG_TMP007_GPIO_DEV_NAME GPIO device
CONFIG_TMP007_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_TMP007_FIBER_PRIORITY Fiber priority
CONFIG_TMP007_FIBER_STACK_SIZE Fiber stack size
CONFIG_COUNTER Counter Drivers
CONFIG_AON_COUNTER_QMSI AON counter driver
CONFIG_AON_COUNTER_QMSI_DEV_NAME QMSI AON Counter Device Name
CONFIG_AON_TIMER_QMSI AON periodic timer driver
CONFIG_AON_TIMER_QMSI_DEV_NAME QMSI AON Timer Device Name
CONFIG_AON_TIMER_IRQ_PRI Interrupt priority
CONFIG_BLUETOOTH Bluetooth support
CONFIG_BLUETOOTH_STACK_HCI HCI Stack
CONFIG_BLUETOOTH_STACK_NBLE Nordic BLE Stack
CONFIG_BLUETOOTH_LE Bluetooth Low Energy (LE) support
CONFIG_BLUETOOTH_HCI_CMD_COUNT Number of HCI command buffers
CONFIG_BLUETOOTH_MAX_CMD_LEN Maximum supported HCI command length
CONFIG_BLUETOOTH_HCI_EVT_COUNT Number of HCI event buffers
CONFIG_BLUETOOTH_MAX_EVT_LEN Maximum supported HCI event length
CONFIG_BLUETOOTH_CONN  
CONFIG_BLUETOOTH_ACL_IN_COUNT Number of incoming ACL data buffers
CONFIG_BLUETOOTH_L2CAP_IN_MTU Maximum supported L2CAP MTU for incoming data
CONFIG_BLUETOOTH_ATT_MTU Attribute Protocol (ATT) channel MTU
CONFIG_BLUETOOTH_PRIVACY Privacy Feature
CONFIG_BLUETOOTH_SIGNING Data signing support
CONFIG_BLUETOOTH_SMP_SC_ONLY Secure Connections Only Mode
CONFIG_BLUETOOTH_TINYCRYPT_ECC Use TinyCrypt library for LE SC ECDH
CONFIG_BLUETOOTH_USE_DEBUG_KEYS Enable Security Manager Debug Mode
CONFIG_BLUETOOTH_L2CAP_DYNAMIC_CHANNEL L2CAP Dynamic Channel support
CONFIG_BLUETOOTH_GATT_DYNAMIC_DB GATT dynamic database support
CONFIG_BLUETOOTH_DEBUG  
CONFIG_BLUETOOTH_DEBUG_NONE No debug log
CONFIG_BLUETOOTH_DEBUG_LOG Normal printf-style to console
CONFIG_BLUETOOTH_DEBUG_MONITOR Monitor protocol over UART
CONFIG_BLUETOOTH_DEBUG_COLOR Use colored logs
CONFIG_BLUETOOTH_MONITOR_ON_DEV_NAME Device Name of Bluetooth monitor logging UART
CONFIG_BLUETOOTH_DEBUG_HCI_CORE Bluetooth HCI core debug
CONFIG_BLUETOOTH_DEBUG_CONN Bluetooth connection debug
CONFIG_BLUETOOTH_DEBUG_KEYS Bluetooth security keys debug
CONFIG_BLUETOOTH_DEBUG_L2CAP Bluetooth L2CAP debug
CONFIG_BLUETOOTH_DEBUG_SMP Bluetooth Security Manager Protocol (SMP) debug
CONFIG_BLUETOOTH_SMP_SELFTEST Bluetooth SMP self tests executed on init
CONFIG_BLUETOOTH_DEBUG_ATT Bluetooth Attribute Protocol (ATT) debug
CONFIG_BLUETOOTH_BREDR Bluetooth BR/EDR support [EXPERIMENTAL]
CONFIG_NETWORKING Generic networking support
CONFIG_IP_BUF_RX_SIZE Number of IP net buffers to use when receiving data
CONFIG_IP_BUF_TX_SIZE Number of IP net buffers to use when sending data
CONFIG_IP_RX_STACK_SIZE RX fiber stack size
CONFIG_IP_TX_STACK_SIZE TX fiber stack size
CONFIG_IP_TIMER_STACK_SIZE Timer fiber stack size
CONFIG_NET_MAX_CONTEXTS How many network context to use
CONFIG_UDP_MAX_CONNECTIONS How many UDP connections can be used
CONFIG_NETWORKING_WITH_IPV6 IPv6
CONFIG_NETWORKING_WITH_IPV4 IPv4
CONFIG_NETWORKING_WITH_LOGGING Enable network stack logging
CONFIG_NETWORK_IP_STACK_DEBUG_PRINT Print only debug messages
CONFIG_NETWORK_IP_STACK_DEBUG_ANNOTATE Print only annotations
CONFIG_NETWORK_IP_STACK_DEBUG_FULL Print both messages and annotations
CONFIG_NETWORK_IP_STACK_DEBUG_CONTEXT Debug network context allocation
CONFIG_NETWORK_IP_STACK_DEBUG_NET_BUF Debug network buffer allocation
CONFIG_NETWORK_IP_STACK_DEBUG_RECV_SEND Debug network generic receive and send functions
CONFIG_NETWORK_IP_STACK_DEBUG_TCP_PSOCK Debug network TCP protosockets
CONFIG_NETWORK_IP_STACK_DEBUG_IPV6 Debug core IPv6
CONFIG_NETWORK_IP_STACK_DEBUG_SIMPLE_UDP Debug simple udp
CONFIG_NETWORK_IP_STACK_DEBUG_UDP_PACKET Debug uip udp packet
CONFIG_NETWORK_IP_STACK_DEBUG_IPV6_DS Debug IPv6 Data Structures
CONFIG_NETWORK_IP_STACK_DEBUG_IPV6_ICMPV6 Debug ICMPv6
CONFIG_NETWORK_IP_STACK_DEBUG_IPV6_ND Debug IPv6 Neighbour Discovery
CONFIG_NETWORK_IP_STACK_DEBUG_IPV6_NBR_CACHE Debug IPv6 neighbour cache
CONFIG_NETWORK_IP_STACK_DEBUG_IPV6_ROUTE Debug IPv6 route
CONFIG_NETWORK_IP_STACK_DEBUG_15_4_NET_DRIVER Debug 802.15.4 network driver
CONFIG_NETWORK_IP_STACK_DEBUG_15_4_MAC Debug 802.15.4 MAC layer
CONFIG_NETWORK_IP_STACK_DEBUG_15_4_FRAMING Debug 802.15.4 packet framing
CONFIG_NETWORK_IP_STACK_DEBUG_15_4_6LOWPAN_FRAG Debug 802.15.4 6LoWPAN fragmentation
CONFIG_NETWORK_IP_STACK_DEBUG_6LOWPAN_COMPRESSION Debug generic 6LoWPAN compression
CONFIG_NETWORK_IP_STACK_DEBUG_PACKET_QUEUE Debug uip packet queue
CONFIG_NETWORK_IP_STACK_DEBUG_RPL Debug RPL messages
CONFIG_NETWORK_IP_STACK_DEBUG_RPL_ICMPV6 Debug RPL ICMPv6 messages
CONFIG_NETWORK_IP_STACK_DEBUG_RPL_OF Debug RPL objective function messages
CONFIG_NETWORK_IP_STACK_DEBUG_RPL_TIMERS Debug RPL timer functionality
CONFIG_NETWORK_IP_STACK_DEBUG_IPV4 Debug core IPv4
CONFIG_NETWORK_IP_STACK_DEBUG_IPV4_ARP Debug IPv4 ARP
CONFIG_NETWORK_IP_STACK_DEBUG_COAP_CONTEXT Debug CoAP context
CONFIG_NETWORK_IP_STACK_DEBUG_COAP_ENGINE Debug CoAP engine
CONFIG_NETWORK_IP_STACK_DEBUG_COAP_TRANSACTION Debug CoAP transaction
CONFIG_NETWORK_IP_STACK_DEBUG_COAP_INTERNAL Debug CoAP internals
CONFIG_NETWORK_IP_STACK_DEBUG_COAP_OBSERVE Debug CoAP observe
CONFIG_NETWORK_IP_STACK_DEBUG_COAP_WELL_KNOWN Debug CoAP well known core
CONFIG_NETWORK_IP_STACK_DEBUG_REST_ENGINE Debug REST engine
CONFIG_NETWORK_IP_STACK_DEBUG_DHCP Debug DHCP
CONFIG_NETWORKING_STATISTICS Enable IP statistics gathering
CONFIG_NETWORKING_IPV6_NO_ND Disable IPv6 neighbor discovery
CONFIG_NETWORKING_MAX_NEIGHBORS Max number of neighbors
CONFIG_NETWORKING_WITH_TCP Enable TCP protocol
CONFIG_TCP_MAX_CONNECTIONS Maximum number of connections
CONFIG_TCP_DISABLE_ACTIVE_OPEN Disallow host to initiate connection attempt
CONFIG_TCP_MSS TCP maximum segment size
CONFIG_TCP_RECEIVE_WINDOW TCP receive window size
CONFIG_NETWORKING_WITH_RPL Enable RPL (ripple) IPv6 mesh routing protocol
CONFIG_RPL_STATS Enable RPL statistics
CONFIG_RPL_PROBING Enable RPL probing
CONFIG_RPL_WITH_MRHOF Minimum Rank with Hysteresis, RFC 6719
CONFIG_RPL_WITH_OF0 OF Zero, RFC 6552
CONFIG_NETWORKING_WITH_LOOPBACK Enable loopback driver
CONFIG_NETWORK_LOOPBACK_TEST_COUNT How many packets the loopback test passes
CONFIG_NETWORKING_NO_WIRED No wired network driver
CONFIG_NETWORKING_UART Network UART/slip driver
CONFIG_ETHERNET Ethernet drivers
CONFIG_NETWORKING_DEBUG_UART Network UART driver debug
CONFIG_ETHERNET_DEBUG Network Ethernet driver debug
CONFIG_L2_BUFFERS  
CONFIG_NETWORKING_WITH_15_4 Enable 802.15.4 driver
CONFIG_NETWORKING_WITH_15_4_ALWAYS_ACK Always request 802.15.4 packet acknowledgment
CONFIG_NETWORKING_WITH_15_4_MAC_NULL  
CONFIG_NETWORKING_WITH_15_4_RDC_SIMPLE simplerdc driver
CONFIG_NETWORKING_WITH_15_4_RDC_SICSLOWMAC sicslowmac driver
CONFIG_15_4_RX_STACK_SIZE Stack size of 802.15.4 RX fiber
CONFIG_15_4_TX_STACK_SIZE Stack size of 802.15.4 TX fiber
CONFIG_15_4_BEACON_SUPPORT Enable 802.15.4 beacon support
CONFIG_15_4_BEACON_STATS Enable 802.15.4 beacon statistics
CONFIG_NETWORKING_WITH_15_4_PAN_ID IEEE 802.15.4 PAN id/address
CONFIG_NETWORKING_WITH_15_4_TI_CC2520 TI CC2520
CONFIG_NETWORKING_WITH_15_4_LOOPBACK Loopback
CONFIG_NETWORKING_WITH_15_4_LOOPBACK_UART Loopback with UART
CONFIG_NETWORKING_WITH_BT Enable Bluetooth driver
CONFIG_NETWORKING_WITH_6LOWPAN Enable 6LoWPAN (IPv6 compression) in the uIP stack
CONFIG_6LOWPAN_COMPRESSION_IPV6 No compression
CONFIG_6LOWPAN_COMPRESSION_IPHC IP header compression
CONFIG_TINYDTLS Enable tinyDTLS support.
CONFIG_TINYDTLS_DEBUG Enable tinyDTLS debugging support.
CONFIG_ER_COAP Enable Erbium CoAP engine support.
CONFIG_ER_COAP_WITH_DTLS Use DTLS in CoAP
CONFIG_COAP_STATS Enable CoAP statistics
CONFIG_ER_COAP_CLIENT Enable CoAP client support
CONFIG_DHCP Enable DHCP support.
CONFIG_DHCP_BROADCAST Broadcast message
CONFIG_DHCP_UNICAST Unicast message
CONFIG_NET_SANITY_TEST Enable networking sanity test
CONFIG_NET_15_4_LOOPBACK_NUM Number of times loopback test runs
CONFIG_NET_TESTING Enable network testing setup
CONFIG_NET_BUF Network buffer support
CONFIG_NET_BUF_DEBUG Network buffer debugging
CONFIG_KERNEL_BIN_NAME The kernel binary name
CONFIG_HAVE_CUSTOM_LINKER_SCRIPT Custom linker scripts provided
CONFIG_CUSTOM_LINKER_SCRIPT Path to custom linker script
CONFIG_VERSION_HEADER Add a version header to binary
CONFIG_CROSS_COMPILE Cross-compiler tool prefix
CONFIG_GDB_INFO Task-aware debugging with GDB
CONFIG_LINK_WHOLE_ARCHIVE Allow linking with –whole-archive
CONFIG_COMPILER_OPT Custom compiler options
CONFIG_TOOLCHAIN_VARIANT Cross-compiler variant name
CONFIG_CPLUSPLUS Enable C++ support for the application
CONFIG_MINIMAL_LIBC Build minimal c library
CONFIG_NEWLIB_LIBC Build with newlib c library
CONFIG_MINIMAL_LIBC_EXTENDED Build additional libc functions [EXPERIMENTAL]
CONFIG_DEBUG Build kernel with debugging enabled
CONFIG_TASK_DEBUG Task debugging [EXPERIMENTAL]
CONFIG_STACK_USAGE Generate stack usage information
CONFIG_PRINTK Send printk() to console
CONFIG_STDOUT_CONSOLE Send stdout to console
CONFIG_EARLY_CONSOLE Send stdout at the earliest stage possible
CONFIG_ASSERT Enable __ASSERT() macro
CONFIG_ASSERT_LEVEL __ASSERT() level
CONFIG_DEBUG_TRACING_KERNEL_OBJECTS Debug tracing object
CONFIG_MEM_SAFE Enable safe memory access
CONFIG_MEM_SAFE_CHECK_BOUNDARIES Software validation of memory access within memory regions
CONFIG_MEM_SAFE_NUM_EXTRA_REGIONS Number of safe memory access regions to be added at runtime
CONFIG_DEBUGGER_OWNS_FATAL_PROG_EXC_HANDLERS Debugger provides handlers for some fatal programmer exceptions
CONFIG_DEBUG_INFO Enable system debugging information
CONFIG_GDB_SERVER Enable GDB Server [EXPERIMENTAL]
CONFIG_GDB_SERVER_MAX_SW_BP Maximum number of GDB Server Software breakpoints
CONFIG_GDB_SERVER_INTERRUPT_DRIVEN Enable GDB interrupt mode
CONFIG_GDB_REMOTE_SERIAL_EXT_NOTIF_PREFIX_STR Trigger string for remote serial ext. via notifi. packets
CONFIG_GDB_SERVER_BOOTLOADER Enable the bootloader mode
CONFIG_SYS_LOG Enable Logging
CONFIG_SYS_LOG_SHOW_TAGS Prepend level tags to logs
CONFIG_SYS_LOG_SHOW_COLOR Use colored logs
CONFIG_SYS_LOG_DEFAULT_LEVEL Default log level
CONFIG_SYS_LOG_OVERRIDE_LEVEL Override lowest log level
CONFIG_PERFORMANCE_METRICS Enable performance metrics [EXPERIMENTAL]
CONFIG_BOOT_TIME_MEASUREMENT Boot time measurements [EXPERIMENTAL]
CONFIG_CPU_CLOCK_FREQ_MHZ CPU CLock Frequency in MHz
CONFIG_IS_BOOTLOADER Act as a bootloader
CONFIG_BOOTLOADER_SRAM_SIZE SRAM reserved for when Zephyr acts as a bootloader
CONFIG_BOOTLOADER_KEXEC Boot using Linux kexec() system call
CONFIG_BOOTLOADER_UNKNOWN Generic boot loader support
CONFIG_REBOOT Reboot functionality
CONFIG_HAS_CMSIS  
CONFIG_HAS_NORDIC_MDK  
CONFIG_HAS_QMSI  
CONFIG_QMSI QMSI driver support
CONFIG_QMSI_BUILTIN Enable QMSI drivers through integrated sources
CONFIG_QMSI_LIBRARY Enable QMSI drivers using external library
CONFIG_QMSI_INSTALL_PATH QMSI install path
CONFIG_TINYCRYPT Cryptography Support
CONFIG_TINYCRYPT_SHA256 SHA-256 Hash function support
CONFIG_TINYCRYPT_SHA256_HMAC HMAC (via SHA256) message auth support
CONFIG_TINYCRYPT_SHA256_HMAC_PRNG PRNG (via HMAC-SHA256) support
CONFIG_TINYCRYPT_ECC_DH ECC_DH anonymous key agreement protocol
CONFIG_TINYCRYPT_ECC_DSA ECC_DSA digital signature algorithm
CONFIG_TINYCRYPT_AES AES-128 decrypt/encrypt
CONFIG_TINYCRYPT_AES_CBC AES-128 block cipher
CONFIG_TINYCRYPT_AES_CTR AES-128 counter mode
CONFIG_TINYCRYPT_AES_CCM AES-128 CCM mode
CONFIG_TINYCRYPT_AES_CMAC AES-128 CMAC mode
CONFIG_TI_CC2520_GPIO_NAME  
CONFIG_TI_CC2520_GPIO_AON_NAME  
CONFIG_UART_NS16550_PORT_1_PCI